Lines Matching defs:io
52 #include <linux/io.h>
95 static int io = IT87_CIR_DEFAULT_IOBASE;
279 outb(((inb(io + IT87_CIR_TCR2) & IT87_CIR_TCR2_TXMPW) |
281 io + IT87_CIR_TCR2);
412 outb((inb(io + IT87_CIR_RCR) & ~IT87_CIR_RCR_RXEN) |
413 IT87_CIR_RCR_RXACT, io + IT87_CIR_RCR);
415 outb(inb(io + IT87_CIR_RCR) | IT87_CIR_RCR_RXEN,
416 io + IT87_CIR_RCR);
421 outb(inb(io + IT87_CIR_TCR1) | IT87_CIR_TCR1_FIFOCLR,
422 io+IT87_CIR_TCR1);
464 iir = inb(io + IT87_CIR_IIR);
469 lsr = inb(io + IT87_CIR_RSR) & (IT87_CIR_RSR_RXFTO |
482 data = inb(io + IT87_CIR_DR);
523 data = inb(io + IT87_CIR_DR);
582 outb((inb(io + IT87_CIR_RCR) &
585 io + IT87_CIR_RCR);
587 outb(inb(io + IT87_CIR_RCR) |
589 io + IT87_CIR_RCR);
627 inb(io + IT87_CIR_TSR) &
630 while ((inb(io + IT87_CIR_TSR) &
635 outb(byte_out, io + IT87_CIR_DR);
667 outb(inb(io + IT87_CIR_RCR) & ~IT87_CIR_RCR_RXEN,
668 io + IT87_CIR_RCR);
685 while ((inb(io + IT87_CIR_TSR) & IT87_CIR_TSR_TXFBC) != 0)
690 outb(inb(io + IT87_CIR_RCR) | IT87_CIR_RCR_RXEN,
691 io + IT87_CIR_RCR);
704 outb(IT87_CIR_IER_BR, io + IT87_CIR_IER);
705 outb(IT87_CIR_BAUDRATE_DIVISOR % 0x100, io+IT87_CIR_BDLR);
706 outb(IT87_CIR_BAUDRATE_DIVISOR / 0x100, io+IT87_CIR_BDHR);
709 outb(IT87_CIR_IER_IEC | IT87_CIR_IER_RFOIE, io + IT87_CIR_IER);
712 outb(IT87_CIR_IER_IEC | IT87_CIR_IER_RDAIE, io + IT87_CIR_IER);
718 outb(it87_rcr, io + IT87_CIR_RCR);
721 outb(inb(io + IT87_CIR_TCR1) | 0x00,
722 io + IT87_CIR_TCR1);
729 io + IT87_CIR_TCR2);
733 io + IT87_CIR_TCR2);
748 outb(0x1, io + IT87_CIR_RCR);
750 outb(0, io + IT87_CIR_IER);
752 outb(IT87_CIR_TCR1_FIFOCLR, io+IT87_CIR_TCR1);
754 outb(IT87_CIR_IER_RESET, io+IT87_CIR_IER);
824 if (io == 0)
825 io = IT87_CIR_DEFAULT_IOBASE;
827 ": set default io 0x%x\n",
828 io);
829 it87_write(IT87_CIR_BASE_MSB, io / 0x100);
830 it87_write(IT87_CIR_BASE_LSB, io % 0x100);
832 io = it87_io;
847 outb(IT87_CIR_IER_RESET, io+IT87_CIR_IER);
852 IT87_CIR_TCR1_TXENDF, io+IT87_CIR_TCR1);
856 if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) {
858 ": i/o port 0x%.4x already in use.\n", io);
876 release_region(io, 8);
881 ": I/O port 0x%.4x, IRQ %d.\n", io, irq);
896 release_region(io, 8);
973 module_param(io, int, S_IRUGO);
974 MODULE_PARM_DESC(io, "I/O base address (default: 0x310)");