Lines Matching refs:pd
198 dt3155_start_acq(struct dt3155_priv *pd)
200 struct videobuf_buffer *vb = pd->curr_buf;
204 iowrite32(dma_addr, pd->regs + EVEN_DMA_START);
205 iowrite32(dma_addr + vb->width, pd->regs + ODD_DMA_START);
206 iowrite32(vb->width, pd->regs + EVEN_DMA_STRIDE);
207 iowrite32(vb->width, pd->regs + ODD_DMA_STRIDE);
210 FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR);
213 pd->regs + CSR1);
214 wait_i2c_reg(pd->regs);
215 write_i2c_reg(pd->regs, CONFIG, pd->config);
216 write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE);
217 write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_DONE);
220 write_i2c_reg(pd->regs, CSR2, pd->csr2 | BUSY_EVEN | BUSY_ODD);
225 dt3155_stop_acq(struct dt3155_priv *pd)
230 wait_i2c_reg(pd->regs);
231 write_i2c_reg(pd->regs, CSR2, pd->csr2);
234 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR);
235 write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE);
236 write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_DONE);
237 tmp = ioread32(pd->regs + CSR1) & (FLD_CRPT_EVEN | FLD_CRPT_ODD);
242 pd->regs + CSR1);
281 struct dt3155_priv *pd = q->priv_data;
285 list_add_tail(&vb->queue, &pd->dmaq);
286 wake_up_interruptible_sync(&pd->do_dma);
391 struct dt3155_priv *pd = arg;
396 wait_event_interruptible(pd->do_dma,
397 kthread_should_stop() || !list_empty(&pd->dmaq));
401 spin_lock_irqsave(&pd->lock, flags);
402 if (pd->curr_buf) /* dma is active */
404 if (list_empty(&pd->dmaq)) /* no empty biffers */
406 vb = list_first_entry(&pd->dmaq, typeof(*vb), queue);
410 pd->curr_buf = vb;
411 spin_unlock_irqrestore(&pd->lock, flags);
413 dt3155_start_acq(pd);
418 spin_unlock_irqrestore(&pd->lock, flags);
427 struct dt3155_priv *pd = video_drvdata(filp);
429 printk(KERN_INFO "dt3155: open(): minor: %i\n", pd->vdev->minor);
431 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
433 if (!pd->users) {
434 pd->vidq = kzalloc(sizeof(*pd->vidq), GFP_KERNEL);
435 if (!pd->vidq) {
440 videobuf_queue_dma_contig_init(pd->vidq, &vbq_ops,
441 &pd->pdev->dev, &pd->lock,
443 sizeof(struct videobuf_buffer), pd);
446 pd->regs + INT_CSR);
447 pd->irq_handler = dt3155_irq_handler_even;
448 ret = request_irq(pd->pdev->irq, pd->irq_handler,
449 IRQF_SHARED, DT3155_NAME, pd);
454 pd->curr_buf = NULL;
455 pd->thread = kthread_run(dt3155_threadfn, pd,
456 "dt3155_thread_%i", pd->vdev->minor);
457 if (IS_ERR(pd->thread)) {
459 ret = PTR_ERR(pd->thread);
462 pd->field_count = 0;
464 pd->users++;
467 free_irq(pd->pdev->irq, pd);
469 kfree(pd->vidq);
470 pd->vidq = NULL;
473 mutex_unlock(&pd->mux);
480 struct dt3155_priv *pd = video_drvdata(filp);
485 printk(KERN_INFO "dt3155: release(): minor: %i\n", pd->vdev->minor);
487 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
489 pd->users--;
490 BUG_ON(pd->users < 0);
491 if (pd->acq_fp == filp) {
492 spin_lock_irqsave(&pd->lock, flags);
493 INIT_LIST_HEAD(&pd->dmaq); /* queue is emptied */
494 tmp = pd->curr_buf;
495 spin_unlock_irqrestore(&pd->lock, flags);
498 dt3155_stop_acq(pd);
499 videobuf_stop(pd->vidq);
500 pd->acq_fp = NULL;
501 pd->streaming = 0;
503 if (!pd->users) {
504 kthread_stop(pd->thread);
505 free_irq(pd->pdev->irq, pd);
506 kfree(pd->vidq);
507 pd->vidq = NULL;
509 mutex_unlock(&pd->mux);
516 struct dt3155_priv *pd = video_drvdata(filp);
519 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
521 if (!pd->acq_fp) {
522 pd->acq_fp = filp;
523 pd->streaming = 0;
524 } else if (pd->acq_fp != filp) {
527 } else if (pd->streaming == 1) {
531 ret = videobuf_read_stream(pd->vidq, user, size, loff, 0,
534 mutex_unlock(&pd->mux);
541 struct dt3155_priv *pd = video_drvdata(filp);
543 return videobuf_poll_stream(filp, pd->vidq, polltbl);
549 struct dt3155_priv *pd = video_drvdata(filp);
551 return videobuf_mmap_mapper(pd->vidq, vma);
567 struct dt3155_priv *pd = video_drvdata(filp);
570 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
572 if (!pd->acq_fp) {
573 ret = videobuf_streamon(pd->vidq);
576 pd->acq_fp = filp;
577 pd->streaming = 1;
578 wake_up_interruptible_sync(&pd->do_dma);
579 } else if (pd->acq_fp == filp) {
580 pd->streaming = 1;
581 ret = videobuf_streamon(pd->vidq);
583 wake_up_interruptible_sync(&pd->do_dma);
587 mutex_unlock(&pd->mux);
594 struct dt3155_priv *pd = video_drvdata(filp);
599 ret = videobuf_streamoff(pd->vidq);
602 spin_lock_irqsave(&pd->lock, flags);
603 tmp = pd->curr_buf;
604 spin_unlock_irqrestore(&pd->lock, flags);
613 struct dt3155_priv *pd = video_drvdata(filp);
617 sprintf(cap->bus_info, "PCI:%s", pci_name(pd->pdev));
670 struct dt3155_priv *pd = video_drvdata(filp);
673 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
675 if (!pd->acq_fp) {
676 pd->acq_fp = filp;
677 pd->streaming = 0;
678 } else if (pd->acq_fp != filp) {
684 mutex_unlock(&pd->mux);
691 struct dt3155_priv *pd = video_drvdata(filp);
692 struct videobuf_queue *q = pd->vidq;
697 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
699 if (!pd->acq_fp)
700 pd->acq_fp = filp;
701 else if (pd->acq_fp != filp) {
705 pd->streaming = 1;
708 mutex_unlock(&pd->mux);
725 struct dt3155_priv *pd = video_drvdata(filp);
726 struct videobuf_queue *q = pd->vidq;
734 struct dt3155_priv *pd = video_drvdata(filp);
735 struct videobuf_queue *q = pd->vidq;
747 struct dt3155_priv *pd = video_drvdata(filp);
748 struct videobuf_queue *q = pd->vidq;
877 struct dt3155_priv *pd = pci_get_drvdata(dev);
887 pd->regs + CSR1);
892 iowrite32(FIFO_EN | SRST, pd->regs + CSR1);
894 iowrite32(0xEEEEEE01, pd->regs + EVEN_PIXEL_FMT);
895 iowrite32(0xEEEEEE01, pd->regs + ODD_PIXEL_FMT);
896 iowrite32(0x00000020, pd->regs + FIFO_TRIGER);
897 iowrite32(0x00000103, pd->regs + XFER_MODE);
898 iowrite32(0, pd->regs + RETRY_WAIT_CNT);
899 iowrite32(0, pd->regs + INT_CSR);
900 iowrite32(1, pd->regs + EVEN_FLD_MASK);
901 iowrite32(1, pd->regs + ODD_FLD_MASK);
902 iowrite32(0, pd->regs + MASK_LENGTH);
903 iowrite32(0x0005007C, pd->regs + FIFO_FLAG_CNT);
904 iowrite32(0x01010101, pd->regs + IIC_CLK_DUR);
908 read_i2c_reg(pd->regs, DT_ID, &tmp);
913 write_i2c_reg(pd->regs, AD_ADDR, 0);
915 write_i2c_reg(pd->regs, AD_LUT, i);
918 write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG);
919 write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3);
920 write_i2c_reg(pd->regs, AD_ADDR, AD_POS_REF);
921 write_i2c_reg(pd->regs, AD_CMD, 34);
922 write_i2c_reg(pd->regs, AD_ADDR, AD_NEG_REF);
923 write_i2c_reg(pd->regs, AD_CMD, 0);
926 write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM);
928 write_i2c_reg(pd->regs, PM_LUT_ADDR, i);
929 write_i2c_reg(pd->regs, PM_LUT_DATA, i);
931 write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM | PM_LUT_SEL);
933 write_i2c_reg(pd->regs, PM_LUT_ADDR, i);
934 write_i2c_reg(pd->regs, PM_LUT_DATA, i);
936 write_i2c_reg(pd->regs, CONFIG, pd->config); /* ACQ_MODE_EVEN */
939 write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG);
940 write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3);
950 iowrite32(buf_dma, pd->regs + EVEN_DMA_START);
951 iowrite32(buf_dma, pd->regs + ODD_DMA_START);
952 iowrite32(0, pd->regs + EVEN_DMA_STRIDE);
953 iowrite32(0, pd->regs + ODD_DMA_STRIDE);
956 iowrite32(FIFO_EN | SRST | CAP_CONT_ODD, pd->regs + CSR1);
957 write_i2c_reg(pd->regs, CSR2, pd->csr2 | SYNC_SNTL);
958 write_i2c_reg(pd->regs, CONFIG, pd->config);
959 write_i2c_reg(pd->regs, EVEN_CSR, CSR_SNGL);
960 write_i2c_reg(pd->regs, CSR2, pd->csr2 | BUSY_EVEN | SYNC_SNTL);
962 read_i2c_reg(pd->regs, CSR2, &tmp);
963 write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_SNGL | CSR_DONE);
964 write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_SNGL | CSR_DONE);
965 write_i2c_reg(pd->regs, CSR2, pd->csr2);
966 iowrite32(FIFO_EN | SRST | FLD_DN_EVEN | FLD_DN_ODD, pd->regs + CSR1);
1055 struct dt3155_priv *pd;
1068 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
1069 if (!pd) {
1073 pd->vdev = video_device_alloc();
1074 if (!pd->vdev) {
1078 *pd->vdev = dt3155_vdev;
1079 pci_set_drvdata(dev, pd); /* for use in dt3155_remove() */
1080 video_set_drvdata(pd->vdev, pd); /* for use in video_fops */
1081 pd->users = 0;
1082 pd->acq_fp = NULL;
1083 pd->pdev = dev;
1084 INIT_LIST_HEAD(&pd->dmaq);
1085 init_waitqueue_head(&pd->do_dma);
1086 mutex_init(&pd->mux);
1087 pd->csr2 = csr2_init;
1088 pd->config = config_init;
1089 err = pci_enable_device(pd->pdev);
1094 err = pci_request_region(pd->pdev, 0, pci_name(pd->pdev));
1097 pd->regs = pci_iomap(pd->pdev, 0, pci_resource_len(pd->pdev, 0));
1098 if (!pd->regs) {
1103 err = dt3155_init_board(pd->pdev);
1108 err = video_register_device(pd->vdev, VFL_TYPE_GRABBER, -1);
1117 printk(KERN_INFO "dt3155: /dev/video%i is ready\n", pd->vdev->minor);
1121 pci_iounmap(pd->pdev, pd->regs);
1123 pci_release_region(pd->pdev, 0);
1125 pci_disable_device(pd->pdev);
1127 video_device_release(pd->vdev);
1129 kfree(pd);
1136 struct dt3155_priv *pd = pci_get_drvdata(dev);
1140 video_unregister_device(pd->vdev);
1141 pci_iounmap(dev, pd->regs);
1142 pci_release_region(pd->pdev, 0);
1143 pci_disable_device(pd->pdev);
1148 kfree(pd);