Lines Matching defs:uv_err_sts
1321 uint32_t y_err_sts, uint32_t uv_err_sts)
1326 if (!(y_err_sts & GET_Y0_ERR_MSK) && !(uv_err_sts & GET_UV0_ERR_MSK))
1354 tmp = uv_err_sts & GET_UV0_ERR_MSK;
1358 if (uv_err_sts & MISC1_UV_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK) {
1363 if (uv_err_sts & MISC1_UV_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK) {
1380 if (uv_err_sts & GET_UV0_ERR_MSK) {
1381 tmp = uv_err_sts & GET_UV0_ERR_MSK;
1389 uint32_t y_err_sts, uint32_t uv_err_sts)
1394 if (!(y_err_sts & GET_Y1_ERR_MSK) && !(uv_err_sts & GET_UV1_ERR_MSK))
1423 tmp = uv_err_sts & GET_UV1_ERR_MSK;
1427 if (uv_err_sts & MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK) {
1432 if (uv_err_sts & MISC1_UV_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK) {
1450 if (uv_err_sts & GET_UV1_ERR_MSK) {
1451 tmp = uv_err_sts & GET_UV1_ERR_MSK;
1464 uint32_t y_err_sts, uv_err_sts, y_dn_sz = 0, uv_dn_sz = 0;
1476 uv_err_sts = crystalhd_reg_rd(hw->adp, MISC1_UV_RX_ERROR_STATUS);
1482 ret = crystalhd_rx_list0_handler(hw, intr_sts, y_err_sts, uv_err_sts);
1484 ret = crystalhd_rx_list1_handler(hw, intr_sts, y_err_sts, uv_err_sts);
1500 uv_err_sts, intr_sts, y_dn_sz, uv_dn_sz);