Lines Matching defs:spi_imx
40 #define DRIVER_NAME "spi_imx"
87 static void spi_imx_buf_rx_##type(struct spi_imx_data *spi_imx) \
89 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
91 if (spi_imx->rx_buf) { \
92 *(type *)spi_imx->rx_buf = val; \
93 spi_imx->rx_buf += sizeof(type); \
98 static void spi_imx_buf_tx_##type(struct spi_imx_data *spi_imx) \
102 if (spi_imx->tx_buf) { \
103 val = *(type *)spi_imx->tx_buf; \
104 spi_imx->tx_buf += sizeof(type); \
107 spi_imx->count -= sizeof(type); \
109 writel(val, spi_imx->base + MXC_CSPITXDATA); \
181 static void mx31_intctrl(struct spi_imx_data *spi_imx, int enable)
190 writel(val, spi_imx->base + MXC_CSPIINT);
193 static void mx31_trigger(struct spi_imx_data *spi_imx)
197 reg = readl(spi_imx->base + MXC_CSPICTRL);
199 writel(reg, spi_imx->base + MXC_CSPICTRL);
202 static int mx31_config(struct spi_imx_data *spi_imx,
207 reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) <<
230 writel(reg, spi_imx->base + MXC_CSPICTRL);
235 static int mx31_rx_available(struct spi_imx_data *spi_imx)
237 return readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR;
253 static void mx27_intctrl(struct spi_imx_data *spi_imx, int enable)
262 writel(val, spi_imx->base + MXC_CSPIINT);
265 static void mx27_trigger(struct spi_imx_data *spi_imx)
269 reg = readl(spi_imx->base + MXC_CSPICTRL);
271 writel(reg, spi_imx->base + MXC_CSPICTRL);
274 static int mx27_config(struct spi_imx_data *spi_imx,
279 reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, config->speed_hz) <<
292 writel(reg, spi_imx->base + MXC_CSPICTRL);
297 static int mx27_rx_available(struct spi_imx_data *spi_imx)
299 return readl(spi_imx->base + MXC_CSPIINT) & MX27_INTREG_RR;
313 static void mx1_intctrl(struct spi_imx_data *spi_imx, int enable)
322 writel(val, spi_imx->base + MXC_CSPIINT);
325 static void mx1_trigger(struct spi_imx_data *spi_imx)
329 reg = readl(spi_imx->base + MXC_CSPICTRL);
331 writel(reg, spi_imx->base + MXC_CSPICTRL);
334 static int mx1_config(struct spi_imx_data *spi_imx,
339 reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) <<
348 writel(reg, spi_imx->base + MXC_CSPICTRL);
353 static int mx1_rx_available(struct spi_imx_data *spi_imx)
355 return readl(spi_imx->base + MXC_CSPIINT) & MX1_INTREG_RR;
360 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
361 int gpio = spi_imx->chipselect[spi->chip_select];
371 static void spi_imx_push(struct spi_imx_data *spi_imx)
373 while (spi_imx->txfifo < 8) {
374 if (!spi_imx->count)
376 spi_imx->tx(spi_imx);
377 spi_imx->txfifo++;
380 spi_imx->trigger(spi_imx);
385 struct spi_imx_data *spi_imx = dev_id;
387 while (spi_imx->rx_available(spi_imx)) {
388 spi_imx->rx(spi_imx);
389 spi_imx->txfifo--;
392 if (spi_imx->count) {
393 spi_imx_push(spi_imx);
397 if (spi_imx->txfifo) {
401 spi_imx->intctrl(spi_imx, MXC_INT_RR);
405 spi_imx->intctrl(spi_imx, 0);
406 complete(&spi_imx->xfer_done);
414 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
420 config.cs = spi_imx->chipselect[spi->chip_select];
431 spi_imx->rx = spi_imx_buf_rx_u8;
432 spi_imx->tx = spi_imx_buf_tx_u8;
434 spi_imx->rx = spi_imx_buf_rx_u16;
435 spi_imx->tx = spi_imx_buf_tx_u16;
437 spi_imx->rx = spi_imx_buf_rx_u32;
438 spi_imx->tx = spi_imx_buf_tx_u32;
442 spi_imx->config(spi_imx, &config);
450 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
452 spi_imx->tx_buf = transfer->tx_buf;
453 spi_imx->rx_buf = transfer->rx_buf;
454 spi_imx->count = transfer->len;
455 spi_imx->txfifo = 0;
457 init_completion(&spi_imx->xfer_done);
459 spi_imx_push(spi_imx);
461 spi_imx->intctrl(spi_imx, MXC_INT_TE);
463 wait_for_completion(&spi_imx->xfer_done);
470 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
471 int gpio = spi_imx->chipselect[spi->chip_select];
492 struct spi_imx_data *spi_imx;
511 spi_imx = spi_master_get_devdata(master);
512 spi_imx->bitbang.master = spi_master_get(master);
513 spi_imx->chipselect = mxc_platform_info->chipselect;
516 if (spi_imx->chipselect[i] < 0)
518 ret = gpio_request(spi_imx->chipselect[i], DRIVER_NAME);
522 if (spi_imx->chipselect[i] >= 0)
523 gpio_free(spi_imx->chipselect[i]);
530 spi_imx->bitbang.chipselect = spi_imx_chipselect;
531 spi_imx->bitbang.setup_transfer = spi_imx_setupxfer;
532 spi_imx->bitbang.txrx_bufs = spi_imx_transfer;
533 spi_imx->bitbang.master->setup = spi_imx_setup;
534 spi_imx->bitbang.master->cleanup = spi_imx_cleanup;
535 spi_imx->bitbang.master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
537 init_completion(&spi_imx->xfer_done);
552 spi_imx->base = ioremap(res->start, resource_size(res));
553 if (!spi_imx->base) {
558 spi_imx->irq = platform_get_irq(pdev, 0);
559 if (spi_imx->irq <= 0) {
564 ret = request_irq(spi_imx->irq, spi_imx_isr, 0, DRIVER_NAME, spi_imx);
566 dev_err(&pdev->dev, "can't get irq%d: %d\n", spi_imx->irq, ret);
571 spi_imx->intctrl = mx31_intctrl;
572 spi_imx->config = mx31_config;
573 spi_imx->trigger = mx31_trigger;
574 spi_imx->rx_available = mx31_rx_available;
576 spi_imx->intctrl = mx27_intctrl;
577 spi_imx->config = mx27_config;
578 spi_imx->trigger = mx27_trigger;
579 spi_imx->rx_available = mx27_rx_available;
581 spi_imx->intctrl = mx1_intctrl;
582 spi_imx->config = mx1_config;
583 spi_imx->trigger = mx1_trigger;
584 spi_imx->rx_available = mx1_rx_available;
588 spi_imx->clk = clk_get(&pdev->dev, NULL);
589 if (IS_ERR(spi_imx->clk)) {
591 ret = PTR_ERR(spi_imx->clk);
595 clk_enable(spi_imx->clk);
596 spi_imx->spi_clk = clk_get_rate(spi_imx->clk);
599 writel(1, spi_imx->base + MXC_RESET);
603 while (readl(spi_imx->base + MX3_CSPISTAT) & MX3_CSPISTAT_RR)
604 readl(spi_imx->base + MXC_CSPIRXDATA);
606 spi_imx->intctrl(spi_imx, 0);
608 ret = spi_bitbang_start(&spi_imx->bitbang);
619 clk_disable(spi_imx->clk);
620 clk_put(spi_imx->clk);
622 free_irq(spi_imx->irq, spi_imx);
624 iounmap(spi_imx->base);
629 if (spi_imx->chipselect[i] >= 0)
630 gpio_free(spi_imx->chipselect[i]);
642 struct spi_imx_data *spi_imx = spi_master_get_devdata(master);
645 spi_bitbang_stop(&spi_imx->bitbang);
647 writel(0, spi_imx->base + MXC_CSPICTRL);
648 clk_disable(spi_imx->clk);
649 clk_put(spi_imx->clk);
650 free_irq(spi_imx->irq, spi_imx);
651 iounmap(spi_imx->base);
654 if (spi_imx->chipselect[i] >= 0)
655 gpio_free(spi_imx->chipselect[i]);