Lines Matching refs:DCSR
497 while (!(DCSR(channel) & DCSR_STOPSTATE) && --limit)
508 DCSR(drv_data->rx_channel) = RESET_DMA_CHANNEL;
509 DCSR(drv_data->tx_channel) = RESET_DMA_CHANNEL;
533 DCSR(drv_data->tx_channel) = RESET_DMA_CHANNEL;
534 DCSR(drv_data->rx_channel) = RESET_DMA_CHANNEL;
573 u32 irq_status = DCSR(channel) & DMA_INT_MASK;
616 && (DCSR(drv_data->tx_channel) & DCSR_RUN)) {
1043 DCSR(drv_data->rx_channel) = RESET_DMA_CHANNEL;
1060 DCSR(drv_data->tx_channel) = RESET_DMA_CHANNEL;
1083 DCSR(drv_data->rx_channel) |= DCSR_RUN;
1084 DCSR(drv_data->tx_channel) |= DCSR_RUN;