Lines Matching refs:spi100k
121 struct omap1_spi100k *spi100k = spi_master_get_devdata(master);
124 val = readw(spi100k->base + SPI_SETUP1);
126 writew(val, spi100k->base + SPI_SETUP1);
132 struct omap1_spi100k *spi100k = spi_master_get_devdata(master);
135 val = readw(spi100k->base + SPI_SETUP1);
137 writew(val, spi100k->base + SPI_SETUP1);
142 struct omap1_spi100k *spi100k = spi_master_get_devdata(master);
151 writew( data , spi100k->base + SPI_TX_MSB);
156 spi100k->base + SPI_CTRL);
159 while((readw(spi100k->base + SPI_STATUS) & SPI_STATUS_WE) != SPI_STATUS_WE);
168 struct omap1_spi100k *spi100k = spi_master_get_devdata(master);
178 spi100k->base + SPI_CTRL);
180 while((readw(spi100k->base + SPI_STATUS) & SPI_STATUS_RD) != SPI_STATUS_RD);
183 dataL = readw(spi100k->base + SPI_RX_LSB);
184 dataH = readw(spi100k->base + SPI_RX_MSB);
193 struct omap1_spi100k *spi100k = spi_master_get_devdata(master);
197 SPI_SETUP1_CLOCK_DIVISOR(0), spi100k->base + SPI_SETUP1);
202 SPI_SETUP2_LEVEL_TRIGGER, spi100k->base + SPI_SETUP2);
205 static void omap1_spi100k_force_cs(struct omap1_spi100k *spi100k, int enable)
208 writew(0x05fc, spi100k->base + SPI_CTRL);
210 writew(0x05fd, spi100k->base + SPI_CTRL);
216 struct omap1_spi100k *spi100k;
221 spi100k = spi_master_get_devdata(spi->master);
273 struct omap1_spi100k *spi100k = spi_master_get_devdata(spi->master);
287 writew(0x3e , spi100k->base + SPI_SETUP1);
288 writew(0x00 , spi100k->base + SPI_STATUS);
289 writew(0x3e , spi100k->base + SPI_CTRL);
300 struct omap1_spi100k *spi100k;
309 spi100k = spi_master_get_devdata(spi->master);
315 cs->base = spi100k->base + spi->chip_select * 0x14;
321 clk_enable(spi100k->ick);
322 clk_enable(spi100k->fck);
326 clk_disable(spi100k->ick);
327 clk_disable(spi100k->fck);
334 struct omap1_spi100k *spi100k;
337 spi100k = container_of(work, struct omap1_spi100k, work);
338 spin_lock_irq(&spi100k->lock);
340 clk_enable(spi100k->ick);
341 clk_enable(spi100k->fck);
349 while (!list_empty(&spi100k->msg_queue)) {
357 m = container_of(spi100k->msg_queue.next, struct spi_message,
361 spin_unlock_irq(&spi100k->lock);
381 omap1_spi100k_force_cs(spi100k, 1);
403 omap1_spi100k_force_cs(spi100k, 0);
415 omap1_spi100k_force_cs(spi100k, 0);
420 spin_lock_irq(&spi100k->lock);
423 clk_disable(spi100k->ick);
424 clk_disable(spi100k->fck);
425 spin_unlock_irq(&spi100k->lock);
433 struct omap1_spi100k *spi100k;
440 spi100k = spi_master_get_devdata(spi->master);
443 if (spi100k->state == SPI_SHUTDOWN)
478 spin_lock_irqsave(&spi100k->lock, flags);
479 list_add_tail(&m->queue, &spi100k->msg_queue);
480 queue_work(omap1_spi100k_wq, &spi100k->work);
481 spin_unlock_irqrestore(&spi100k->lock, flags);
486 static int __init omap1_spi100k_reset(struct omap1_spi100k *spi100k)
494 struct omap1_spi100k *spi100k;
500 master = spi_alloc_master(&pdev->dev, sizeof *spi100k);
517 spi100k = spi_master_get_devdata(master);
518 spi100k->master = master;
525 spi100k->base = (void __iomem *) pdev->dev.platform_data;
527 INIT_WORK(&spi100k->work, omap1_spi100k_work);
529 spin_lock_init(&spi100k->lock);
530 INIT_LIST_HEAD(&spi100k->msg_queue);
531 spi100k->ick = clk_get(&pdev->dev, "ick");
532 if (IS_ERR(spi100k->ick)) {
534 status = PTR_ERR(spi100k->ick);
538 spi100k->fck = clk_get(&pdev->dev, "fck");
539 if (IS_ERR(spi100k->fck)) {
541 status = PTR_ERR(spi100k->fck);
545 if (omap1_spi100k_reset(spi100k) < 0)
552 spi100k->state = SPI_RUNNING;
557 clk_put(spi100k->fck);
559 clk_put(spi100k->ick);
568 struct omap1_spi100k *spi100k;
575 spi100k = spi_master_get_devdata(master);
577 spin_lock_irqsave(&spi100k->lock, flags);
579 spi100k->state = SPI_SHUTDOWN;
580 while (!list_empty(&spi100k->msg_queue) && limit--) {
581 spin_unlock_irqrestore(&spi100k->lock, flags);
583 spin_lock_irqsave(&spi100k->lock, flags);
586 if (!list_empty(&spi100k->msg_queue))
589 spin_unlock_irqrestore(&spi100k->lock, flags);
594 clk_put(spi100k->fck);
595 clk_put(spi100k->ick);