Lines Matching refs:R3
159 write_zsreg(uap, R3, regs[R3] & ~RxENABLE);
190 /* Rewrite R3/R5, this time without enables masked. */
191 write_zsreg(uap, R3, regs[R3]);
419 * R3 still signals the interrupts and we see them when taking
422 * R3 interrup status bits are masked by R1 interrupt enable
477 r3 = read_zsreg(uap_a, R3);
883 uap->curregs[R3] = Rx8;
900 write_zsreg(uap, R3, uap->curregs[R3] |= RxENABLE);
1023 uap->curregs[R3] &= ~RxENABLE;
1649 uap->curregs[R3] &= ~RxENABLE;