Lines Matching defs:uart
171 uart 0 mode select */
173 uart 1 mode select */
175 uart 2 mode select */
177 uart 3 mode select */
409 /* uart ports are allocated here - 1 for rs232, 1 for rs422 */
642 * @uart_port: uart port to test for
713 struct ioc4_uartregs __iomem *uart;
728 uart = port->ip_uart_regs;
729 lcr = readb(&uart->i4u_lcr);
730 writeb(lcr | UART_LCR_DLAB, &uart->i4u_lcr);
731 writeb((unsigned char)divisor, &uart->i4u_dll);
732 writeb((unsigned char)(divisor >> 8), &uart->i4u_dlm);
733 writeb(lcr, &uart->i4u_lcr);
739 * get_ioc4_port - given a uart port, return the control structure
740 * @port: uart port
831 struct ioc4_uartregs __iomem *uart;
853 uart = port->ip_uart_regs;
854 writeb(0, &uart->i4u_lcr);
855 writeb(0, &uart->i4u_ier);
861 writeb(UART_LCR_WLEN8 | 0, &uart->i4u_lcr);
865 writeb(UART_FCR_ENABLE_FIFO, &uart->i4u_fcr);
868 &uart->i4u_fcr);
871 writeb(0, &uart->i4u_mcr);
874 readb(&uart->i4u_msr);
1115 /* Get direct hooks to the serial regs and uart regs
1238 /* Reset the input fifo. If the uart received chars while the port
1239 * was closed and DMA is not enabled, the uart may have a bunch of
2594 /* Associate the uart functions above - given to serial core */
2799 "uart space\n", (void *)idd->idd_pdev);