Lines Matching refs:UCR2
60 #define UCR2 0x84 /* Control Register 2 */
312 temp = readl(sport->port.membase + UCR2);
313 writel(temp &~ UCR2_RXEN, sport->port.membase + UCR2);
531 if (readl(sport->port.membase + UCR2) & UCR2_CTS)
542 temp = readl(sport->port.membase + UCR2) & ~UCR2_CTS;
547 writel(temp, sport->port.membase + UCR2);
623 temp = readl(sport->port.membase + UCR2);
625 writel(temp, sport->port.membase + UCR2);
626 while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) &&
681 temp = readl(sport->port.membase + UCR2);
683 writel(temp, sport->port.membase + UCR2);
750 temp = readl(sport->port.membase + UCR2);
752 writel(temp, sport->port.membase + UCR2);
890 old_txrxen = readl(sport->port.membase + UCR2);
892 sport->port.membase + UCR2);
935 writel(ucr2 | old_txrxen, sport->port.membase + UCR2);
1066 old_ucr2 = readl(sport->port.membase + UCR2);
1075 writel(old_ucr2 | UCR2_TXEN, sport->port.membase + UCR2);
1086 writel(old_ucr2, sport->port.membase + UCR2);
1104 ucr2 = readl(sport->port.membase + UCR2);