Lines Matching defs:uap
81 struct uart_amba_port *uap = (struct uart_amba_port *)port;
84 cr = readb(uap->port.membase + UART010_CR);
86 writel(cr, uap->port.membase + UART010_CR);
91 struct uart_amba_port *uap = (struct uart_amba_port *)port;
94 cr = readb(uap->port.membase + UART010_CR);
96 writel(cr, uap->port.membase + UART010_CR);
101 struct uart_amba_port *uap = (struct uart_amba_port *)port;
104 cr = readb(uap->port.membase + UART010_CR);
106 writel(cr, uap->port.membase + UART010_CR);
111 struct uart_amba_port *uap = (struct uart_amba_port *)port;
114 cr = readb(uap->port.membase + UART010_CR);
116 writel(cr, uap->port.membase + UART010_CR);
119 static void pl010_rx_chars(struct uart_amba_port *uap)
121 struct tty_struct *tty = uap->port.state->port.tty;
124 status = readb(uap->port.membase + UART01x_FR);
126 ch = readb(uap->port.membase + UART01x_DR);
129 uap->port.icount.rx++;
135 rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
137 writel(0, uap->port.membase + UART01x_ECR);
141 uap->port.icount.brk++;
142 if (uart_handle_break(&uap->port))
145 uap->port.icount.parity++;
147 uap->port.icount.frame++;
149 uap->port.icount.overrun++;
151 rsr &= uap->port.read_status_mask;
161 if (uart_handle_sysrq_char(&uap->port, ch))
164 uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
167 status = readb(uap->port.membase + UART01x_FR);
169 spin_unlock(&uap->port.lock);
171 spin_lock(&uap->port.lock);
174 static void pl010_tx_chars(struct uart_amba_port *uap)
176 struct circ_buf *xmit = &uap->port.state->xmit;
179 if (uap->port.x_char) {
180 writel(uap->port.x_char, uap->port.membase + UART01x_DR);
181 uap->port.icount.tx++;
182 uap->port.x_char = 0;
185 if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) {
186 pl010_stop_tx(&uap->port);
190 count = uap->port.fifosize >> 1;
192 writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
194 uap->port.icount.tx++;
200 uart_write_wakeup(&uap->port);
203 pl010_stop_tx(&uap->port);
206 static void pl010_modem_status(struct uart_amba_port *uap)
210 writel(0, uap->port.membase + UART010_ICR);
212 status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
214 delta = status ^ uap->old_status;
215 uap->old_status = status;
221 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD);
224 uap->port.icount.dsr++;
227 uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
229 wake_up_interruptible(&uap->port.state->port.delta_msr_wait);
234 struct uart_amba_port *uap = dev_id;
238 spin_lock(&uap->port.lock);
240 status = readb(uap->port.membase + UART010_IIR);
244 pl010_rx_chars(uap);
246 pl010_modem_status(uap);
248 pl010_tx_chars(uap);
253 status = readb(uap->port.membase + UART010_IIR);
259 spin_unlock(&uap->port.lock);
266 struct uart_amba_port *uap = (struct uart_amba_port *)port;
267 unsigned int status = readb(uap->port.membase + UART01x_FR);
273 struct uart_amba_port *uap = (struct uart_amba_port *)port;
277 status = readb(uap->port.membase + UART01x_FR);
290 struct uart_amba_port *uap = (struct uart_amba_port *)port;
292 if (uap->data)
293 uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl);
298 struct uart_amba_port *uap = (struct uart_amba_port *)port;
302 spin_lock_irqsave(&uap->port.lock, flags);
303 lcr_h = readb(uap->port.membase + UART010_LCRH);
308 writel(lcr_h, uap->port.membase + UART010_LCRH);
309 spin_unlock_irqrestore(&uap->port.lock, flags);
314 struct uart_amba_port *uap = (struct uart_amba_port *)port;
320 retval = clk_enable(uap->clk);
324 uap->port.uartclk = clk_get_rate(uap->clk);
329 retval = request_irq(uap->port.irq, pl010_int, 0, "uart-pl010", uap);
336 uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
342 uap->port.membase + UART010_CR);
347 clk_disable(uap->clk);
354 struct uart_amba_port *uap = (struct uart_amba_port *)port;
359 free_irq(uap->port.irq, uap);
364 writel(0, uap->port.membase + UART010_CR);
367 writel(readb(uap->port.membase + UART010_LCRH) &
369 uap->port.membase + UART010_LCRH);
374 clk_disable(uap->clk);
381 struct uart_amba_port *uap = (struct uart_amba_port *)port;
389 baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
413 if (uap->port.fifosize > 1)
416 spin_lock_irqsave(&uap->port.lock, flags);
423 uap->port.read_status_mask = UART01x_RSR_OE;
425 uap->port.read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
427 uap->port.read_status_mask |= UART01x_RSR_BE;
432 uap->port.ignore_status_mask = 0;
434 uap->port.ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
436 uap->port.ignore_status_mask |= UART01x_RSR_BE;
442 uap->port.ignore_status_mask |= UART01x_RSR_OE;
449 uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
452 old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
457 writel(0, uap->port.membase + UART010_CR);
461 writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
462 writel(quot & 0xff, uap->port.membase + UART010_LCRL);
469 writel(lcr_h, uap->port.membase + UART010_LCRH);
470 writel(old_cr, uap->port.membase + UART010_CR);
472 spin_unlock_irqrestore(&uap->port.lock, flags);
558 struct uart_amba_port *uap = (struct uart_amba_port *)port;
562 status = readb(uap->port.membase + UART01x_FR);
565 writel(ch, uap->port.membase + UART01x_DR);
571 struct uart_amba_port *uap = amba_ports[co->index];
574 clk_enable(uap->clk);
579 old_cr = readb(uap->port.membase + UART010_CR);
580 writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
582 uart_console_write(&uap->port, s, count, pl010_console_putchar);
589 status = readb(uap->port.membase + UART01x_FR);
592 writel(old_cr, uap->port.membase + UART010_CR);
594 clk_disable(uap->clk);
598 pl010_console_get_options(struct uart_amba_port *uap, int *baud,
601 if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
603 lcr_h = readb(uap->port.membase + UART010_LCRH);
618 quot = readb(uap->port.membase + UART010_LCRL) |
619 readb(uap->port.membase + UART010_LCRM) << 8;
620 *baud = uap->port.uartclk / (16 * (quot + 1));
626 struct uart_amba_port *uap;
639 uap = amba_ports[co->index];
640 if (!uap)
643 uap->port.uartclk = clk_get_rate(uap->clk);
648 pl010_console_get_options(uap, &baud, &parity, &bits);
650 return uart_set_options(&uap->port, co, baud, parity, bits, flow);
681 struct uart_amba_port *uap;
694 uap = kzalloc(sizeof(struct uart_amba_port), GFP_KERNEL);
695 if (!uap) {
706 uap->clk = clk_get(&dev->dev, NULL);
707 if (IS_ERR(uap->clk)) {
708 ret = PTR_ERR(uap->clk);
712 uap->port.dev = &dev->dev;
713 uap->port.mapbase = dev->res.start;
714 uap->port.membase = base;
715 uap->port.iotype = UPIO_MEM;
716 uap->port.irq = dev->irq[0];
717 uap->port.fifosize = 16;
718 uap->port.ops = &amba_pl010_pops;
719 uap->port.flags = UPF_BOOT_AUTOCONF;
720 uap->port.line = i;
721 uap->dev = dev;
722 uap->data = dev->dev.platform_data;
724 amba_ports[i] = uap;
726 amba_set_drvdata(dev, uap);
727 ret = uart_add_one_port(&amba_reg, &uap->port);
731 clk_put(uap->clk);
735 kfree(uap);
743 struct uart_amba_port *uap = amba_get_drvdata(dev);
748 uart_remove_one_port(&amba_reg, &uap->port);
751 if (amba_ports[i] == uap)
754 iounmap(uap->port.membase);
755 clk_put(uap->clk);
756 kfree(uap);
762 struct uart_amba_port *uap = amba_get_drvdata(dev);
764 if (uap)
765 uart_suspend_port(&amba_reg, &uap->port);
772 struct uart_amba_port *uap = amba_get_drvdata(dev);
774 if (uap)
775 uart_resume_port(&amba_reg, &uap->port);