Lines Matching refs:ALTERA_JTAGUART_CONTROL_REG
45 #define ALTERA_JTAGUART_CONTROL_REG 4
67 return (readl(port->membase + ALTERA_JTAGUART_CONTROL_REG) &
86 writel(pp->imr, port->membase + ALTERA_JTAGUART_CONTROL_REG);
95 writel(pp->imr, port->membase + ALTERA_JTAGUART_CONTROL_REG);
104 writel(pp->imr, port->membase + ALTERA_JTAGUART_CONTROL_REG);
160 count = (readl(port->membase + ALTERA_JTAGUART_CONTROL_REG) &
180 writel(pp->imr, port->membase + ALTERA_JTAGUART_CONTROL_REG);
191 isr = (readl(port->membase + ALTERA_JTAGUART_CONTROL_REG) >>
211 writel(0, port->membase + ALTERA_JTAGUART_CONTROL_REG);
233 writel(pp->imr, port->membase + ALTERA_JTAGUART_CONTROL_REG);
250 writel(pp->imr, port->membase + ALTERA_JTAGUART_CONTROL_REG);
338 while (((status = readl(port->membase + ALTERA_JTAGUART_CONTROL_REG)) &
358 while ((readl(port->membase + ALTERA_JTAGUART_CONTROL_REG) &