Lines Matching refs:TARGET_COMMAND_REG
778 NCR5380_write(TARGET_COMMAND_REG, 0);
1313 NCR5380_write(TARGET_COMMAND_REG, 0);
1572 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1695 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1766 NCR5380_write(TARGET_COMMAND_REG, 1);
1772 NCR5380_write(TARGET_COMMAND_REG, 0);
1849 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
2103 NCR5380_write(TARGET_COMMAND_REG, 0);
2152 NCR5380_write(TARGET_COMMAND_REG, 0);
2365 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN));
2672 NCR5380_write( TARGET_COMMAND_REG,
2680 NCR5380_write( TARGET_COMMAND_REG, 0 );