Lines Matching refs:qla4_8xxx_rd_32
397 qla4_8xxx_rd_32(struct scsi_qla_host *ha, ulong off)
430 done = qla4_8xxx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_LOCK));
452 qla4_8xxx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_UNLOCK));
471 done = qla4_8xxx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM5_LOCK));
492 qla4_8xxx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM5_UNLOCK));
567 win_read = qla4_8xxx_rd_32(ha, ha->mn_win_crb |
588 win_read = qla4_8xxx_rd_32(ha, ha->mn_win_crb |
605 win_read = qla4_8xxx_rd_32(ha,
839 done = qla4_8xxx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_LOCK));
862 qla4_8xxx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_UNLOCK));
872 done = qla4_8xxx_rd_32(ha, QLA82XX_ROMUSB_GLB_STATUS);
900 *valp = qla4_8xxx_rd_32(ha, QLA82XX_ROMUSB_ROM_RDATA);
1084 val = qla4_8xxx_rd_32(ha, BOOT_LOADER_DIMM_STATUS) ;
1155 rst = qla4_8xxx_rd_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET);
1211 temp = qla4_8xxx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);
1226 temp = qla4_8xxx_rd_32(ha,
1347 temp = qla4_8xxx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);
1371 val = qla4_8xxx_rd_32(ha, CRB_CMDPEG_STATE);
1383 pegtune_val = qla4_8xxx_rd_32(ha,
1400 state = qla4_8xxx_rd_32(ha, CRB_RCVPEG_STATE);
1407 state = qla4_8xxx_rd_32(ha, CRB_RCVPEG_STATE);
1427 drv_active = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
1437 drv_active = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
1448 drv_active = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
1449 drv_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DRV_STATE);
1462 drv_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DRV_STATE);
1472 drv_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DRV_STATE);
1482 qsnt_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DRV_STATE);
1566 old_count = qla4_8xxx_rd_32(ha, QLA82XX_PEG_ALIVE_COUNTER);
1576 count = qla4_8xxx_rd_32(ha, QLA82XX_PEG_ALIVE_COUNTER);
1633 drv_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DRV_STATE);
1634 drv_active = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
1650 drv_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DRV_STATE);
1651 drv_active = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
1654 dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE);
1692 dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE);
1708 dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE);
2097 dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE);