Lines Matching refs:ctrl_status
610 ha->pci_attr = RD_REG_WORD(®->ctrl_status);
661 WRT_REG_WORD(®->ctrl_status, 0x20);
662 RD_REG_WORD(®->ctrl_status);
671 WRT_REG_WORD(®->ctrl_status, 0x0);
672 RD_REG_WORD(®->ctrl_status);
692 ha->pci_attr = RD_REG_WORD(®->ctrl_status);
736 ha->pci_attr = RD_REG_DWORD(®->ctrl_status);
856 WRT_REG_WORD(®->ctrl_status, 0x20);
857 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */
870 WRT_REG_WORD(®->ctrl_status, 0x10);
871 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */
889 WRT_REG_WORD(®->ctrl_status, 0);
890 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */
905 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET);
916 if ((RD_REG_WORD(®->ctrl_status) &
974 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
976 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
982 WRT_REG_DWORD(®->ctrl_status,
996 d2 = RD_REG_DWORD(®->ctrl_status);
999 d2 = RD_REG_DWORD(®->ctrl_status);
1074 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET);
1081 data = qla2x00_debounce_register(®->ctrl_status);
1084 data = RD_REG_WORD(®->ctrl_status);
2173 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1)