Lines Matching defs:LSB
91 #define LSB(x) ((uint8_t)(x))
847 * LSB BIT 0 = Enable Hard Loop Id
848 * LSB BIT 1 = Enable Fairness
849 * LSB BIT 2 = Enable Full-Duplex
850 * LSB BIT 3 = Enable Fast Posting
851 * LSB BIT 4 = Enable Target Mode
852 * LSB BIT 5 = Disable Initiator Mode
853 * LSB BIT 6 = Enable ADISC
854 * LSB BIT 7 = Enable Target Inquiry Data
892 * LSB BIT 0 = Timer Operation mode bit 0
893 * LSB BIT 1 = Timer Operation mode bit 1
894 * LSB BIT 2 = Timer Operation mode bit 2
895 * LSB BIT 3 = Timer Operation mode bit 3
896 * LSB BIT 4 = Init Config Mode bit 0
897 * LSB BIT 5 = Init Config Mode bit 1
898 * LSB BIT 6 = Init Config Mode bit 2
899 * LSB BIT 7 = Enable Non part on LIHA failure
916 * LSB BIT 0 = Enable Read xfr_rdy
917 * LSB BIT 1 = Soft ID only
918 * LSB BIT 2 =
919 * LSB BIT 3 =
920 * LSB BIT 4 = FCP RSP Payload [0]
921 * LSB BIT 5 = FCP RSP Payload [1] / Sbus enable - 2200
922 * LSB BIT 6 = Enable Out-of-Order frame handling
923 * LSB BIT 7 = Disable Automatic PLOGI on Local Loop
989 * LSB BIT 0 = Enable Hard Loop Id
990 * LSB BIT 1 = Enable Fairness
991 * LSB BIT 2 = Enable Full-Duplex
992 * LSB BIT 3 = Enable Fast Posting
993 * LSB BIT 4 = Enable Target Mode
994 * LSB BIT 5 = Disable Initiator Mode
995 * LSB BIT 6 = Enable ADISC
996 * LSB BIT 7 = Enable Target Inquiry Data
1021 * LSB BIT 0 = Timer Operation mode bit 0
1022 * LSB BIT 1 = Timer Operation mode bit 1
1023 * LSB BIT 2 = Timer Operation mode bit 2
1024 * LSB BIT 3 = Timer Operation mode bit 3
1025 * LSB BIT 4 = Init Config Mode bit 0
1026 * LSB BIT 5 = Init Config Mode bit 1
1027 * LSB BIT 6 = Init Config Mode bit 2
1028 * LSB BIT 7 = Enable Non part on LIHA failure
1045 * LSB BIT 0 = Enable Read xfr_rdy
1046 * LSB BIT 1 = Soft ID only
1047 * LSB BIT 2 =
1048 * LSB BIT 3 =
1049 * LSB BIT 4 = FCP RSP Payload [0]
1050 * LSB BIT 5 = FCP RSP Payload [1] / Sbus enable - 2200
1051 * LSB BIT 6 = Enable Out-of-Order frame handling
1052 * LSB BIT 7 = Disable Automatic PLOGI on Local Loop
1069 * LSB BIT 0 = Tx Sensitivity 1G bit 0
1070 * LSB BIT 1 = Tx Sensitivity 1G bit 1
1071 * LSB BIT 2 = Tx Sensitivity 1G bit 2
1072 * LSB BIT 3 = Tx Sensitivity 1G bit 3
1073 * LSB BIT 4 = Rx Sensitivity 1G bit 0
1074 * LSB BIT 5 = Rx Sensitivity 1G bit 1
1075 * LSB BIT 6 = Rx Sensitivity 1G bit 2
1076 * LSB BIT 7 = Rx Sensitivity 1G bit 3
1087 * LSB BIT 0 = Output Swing 1G bit 0
1088 * LSB BIT 1 = Output Swing 1G bit 1
1089 * LSB BIT 2 = Output Swing 1G bit 2
1090 * LSB BIT 3 = Output Emphasis 1G bit 0
1091 * LSB BIT 4 = Output Emphasis 1G bit 1
1092 * LSB BIT 5 = Output Swing 2G bit 0
1093 * LSB BIT 6 = Output Swing 2G bit 1
1094 * LSB BIT 7 = Output Swing 2G bit 2
1110 * LSB BIT 0 = Enable spinup delay
1111 * LSB BIT 1 = Disable BIOS
1112 * LSB BIT 2 = Enable Memory Map BIOS
1113 * LSB BIT 3 = Enable Selectable Boot
1114 * LSB BIT 4 = Disable RISC code load
1115 * LSB BIT 5 = Set cache line size 1
1116 * LSB BIT 6 = PCI Parity Disable
1117 * LSB BIT 7 = Enable extended logging
1182 * LSB BIT 0 = External GBIC
1183 * LSB BIT 1 = Risc RAM parity
1184 * LSB BIT 2 = Buffer Plus Module
1185 * LSB BIT 3 = Multi Chip Adapter
1186 * LSB BIT 4 = Internal connector
1187 * LSB BIT 5 =
1188 * LSB BIT 6 =
1189 * LSB BIT 7 =