Lines Matching refs:u_int
575 u_int sg_count;/* How full ahc_dma_seg is */
730 u_int sxfr_u2; /* Value of the SXFR parameter for Ultra2+ Chips */
731 u_int sxfr; /* Value of the SXFR parameter for <= Ultra Chips */
924 u_int untagged_queue_lock;
1002 u_int num_critical_sections;
1035 u_int msgout_len; /* Length of message to send */
1036 u_int msgout_index; /* Current index in msgout */
1037 u_int msgin_index; /* Current index in msgin */
1051 u_int enabled_luns;
1054 u_int init_level;
1057 u_int pci_cachesize;
1064 u_int pci_target_perr_count;
1068 u_int instruction_ram_size;
1094 u_int target;
1095 u_int lun;
1142 u_int port);
1150 u_int tag, role_t role);
1176 char channel, int lun, u_int tag,
1185 char channel, int lun, u_int tag,
1193 u_int our_id, u_int target,
1194 u_int lun, char channel,
1197 const struct ahc_syncrate* ahc_find_syncrate(struct ahc_softc *ahc, u_int *period,
1198 u_int *ppr_options, u_int maxsync);
1199 u_int ahc_find_period(struct ahc_softc *ahc,
1200 u_int scsirate, u_int maxsync);
1217 u_int width, u_int type, int paused);
1221 u_int period, u_int offset,
1222 u_int ppr_options,
1223 u_int type, int paused);
1266 u_int num_entries,
1268 u_int address,
1269 u_int value,
1270 u_int *cur_column,
1271 u_int wrap_point);