Lines Matching refs:VREG_INFO
109 #define VREG_INFO(_vreg, _reg, _en, _index, _stby, _lowpwr) \
121 VREG_INFO(V1, PCAP_REG_VREG1, 1, 2, 18, 0),
122 VREG_INFO(V2, PCAP_REG_VREG1, 5, 6, 19, 22),
123 VREG_INFO(V3, PCAP_REG_VREG1, 7, 8, 20, 23),
124 VREG_INFO(V4, PCAP_REG_VREG1, 11, 12, 21, 24),
126 VREG_INFO(V5, PCAP_REG_VREG1, 15, 16, 12, 19),
128 VREG_INFO(V6, PCAP_REG_VREG2, 1, 2, 14, 20),
129 VREG_INFO(V7, PCAP_REG_VREG2, 3, 4, 15, 21),
130 VREG_INFO(V8, PCAP_REG_VREG2, 5, 6, 16, 22),
131 VREG_INFO(V9, PCAP_REG_VREG2, 9, 10, 17, 23),
132 VREG_INFO(V10, PCAP_REG_VREG2, 10, NA, 18, 24),
134 VREG_INFO(VAUX1, PCAP_REG_AUXVREG, 1, 2, 22, 23),
136 VREG_INFO(VAUX2, PCAP_REG_AUXVREG, 4, 5, 0, 1),
137 VREG_INFO(VAUX3, PCAP_REG_AUXVREG, 7, 8, 2, 3),
138 VREG_INFO(VAUX4, PCAP_REG_AUXVREG, 12, 13, 4, 5),
139 VREG_INFO(VSIM, PCAP_REG_AUXVREG, 17, 18, NA, 6),
140 VREG_INFO(VSIM2, PCAP_REG_AUXVREG, 16, NA, NA, 7),
141 VREG_INFO(VVIB, PCAP_REG_AUXVREG, 19, 20, NA, NA),
143 VREG_INFO(SW1, PCAP_REG_SWCTRL, 1, 2, NA, NA),
144 VREG_INFO(SW2, PCAP_REG_SWCTRL, 6, 7, NA, NA),
146 VREG_INFO(SW3, PCAP_REG_SWCTRL, 11, 12, 24, NA),
149 /* VREG_INFO(SW1S, PCAP_REG_LOWPWR, NA, 12, NA, NA),
150 VREG_INFO(SW2S, PCAP_REG_LOWPWR, NA, 20, NA, NA), */