Lines Matching defs:desc
866 (unsigned long long)qi->desc[index].low,
867 (unsigned long long)qi->desc[index].high);
868 memcpy(&qi->desc[index], &qi->desc[wait_index],
870 __iommu_flush_cache(iommu, &qi->desc[index],
910 int qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu)
921 hw = qi->desc;
938 hw[index] = *desc;
991 struct qi_desc desc;
993 desc.low = QI_IEC_TYPE;
994 desc.high = 0;
997 qi_submit_sync(&desc, iommu);
1003 struct qi_desc desc;
1005 desc.low = QI_CC_FM(fm) | QI_CC_SID(sid) | QI_CC_DID(did)
1007 desc.high = 0;
1009 qi_submit_sync(&desc, iommu);
1017 struct qi_desc desc;
1026 desc.low = QI_IOTLB_DID(did) | QI_IOTLB_DR(dr) | QI_IOTLB_DW(dw)
1028 desc.high = QI_IOTLB_ADDR(addr) | QI_IOTLB_IH(ih)
1031 qi_submit_sync(&desc, iommu);
1037 struct qi_desc desc;
1042 desc.high = QI_DEV_IOTLB_ADDR(addr) | QI_DEV_IOTLB_SIZE;
1044 desc.high = QI_DEV_IOTLB_ADDR(addr);
1049 desc.low = QI_DEV_IOTLB_SID(sid) | QI_DEV_IOTLB_QDEP(qdep) |
1052 qi_submit_sync(&desc, iommu);
1107 dmar_writeq(iommu->reg + DMAR_IQA_REG, virt_to_phys(qi->desc));
1151 qi->desc = page_address(desc_page);
1155 free_page((unsigned long) qi->desc);