• Home
  • History
  • Annotate
  • Raw
  • Download
  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/parport/

Lines Matching refs:FIFO

135 	   -EBUSY: Could not drain FIFO in some finite amount of time,
158 /* This mode resets the FIFO, so we may
163 case ECR_PPF: /* Parallel Port FIFO mode */
177 /* The FIFO is stuck. */
202 /* Find FIFO lossage; FIFO is reset */
204 #endif /* FIFO support */
279 * nFault is 0 if there is at least 1 byte in the Warp's FIFO
280 * pError is 1 if there are 16 bytes in the Warp's FIFO
481 const int fifo = FIFO(port);
512 /* FIFO is full. Wait for interrupt. */
523 printk(KERN_DEBUG "FIFO write timed out\n");
546 /* FIFO is empty. Blast it full. */
711 /* Parallel Port FIFO mode (ECP chipsets) */
727 /* Set up parallel port FIFO mode.*/
730 r = change_mode(port, ECR_PPF); /* Parallel port FIFO */
737 /* Write the data to the FIFO. */
742 * the FIFO is empty, so allow 4 seconds for each position
747 /* Wait for the FIFO to empty */
754 printk(KERN_DEBUG "%s: FIFO is stuck\n", port->name);
759 /* Adjust for the contents of the FIFO. */
765 outb(0, FIFO(port));
768 /* Reset the FIFO and return to PS2 mode. */
827 r = change_mode(port, ECR_ECP); /* ECP FIFO */
833 /* Write the data to the FIFO. */
838 * the FIFO is empty, so allow 4 seconds for each position
843 /* Wait for the FIFO to empty */
850 printk(KERN_DEBUG "%s: FIFO is stuck\n", port->name);
855 /* Adjust for the contents of the FIFO. */
861 outb(0, FIFO(port));
864 /* Reset the FIFO and return to PS2 mode. */
901 #endif /* Allowed to use FIFO/DMA */
1596 /* Find out FIFO depth */
1597 ECR_WRITE(pb, ECR_SPP << 5); /* Reset FIFO */
1598 ECR_WRITE(pb, ECR_TST << 5); /* TEST FIFO */
1600 outb(0xaa, FIFO(pb));
1604 * it doesn't support ECP or FIFO MODE
1613 printk(KERN_DEBUG "0x%lx: FIFO is %d bytes\n", pb->base, i);
1619 inb(FIFO(pb));
1637 frob_set_mode(pb, ECR_PS2); /* Reset FIFO and enable PS2 */
1639 frob_set_mode(pb, ECR_TST); /* Test FIFO */
1643 outb(0xaa, FIFO(pb));
1658 ECR_WRITE(pb, ECR_SPP << 5); /* Reset FIFO */
1855 ECR_WRITE(pb, ECR_SPP << 5); /* Reset FIFO */
1859 /* If Full FIFO sure that writeIntrThreshold is generated */
1861 outb(0xaa, FIFO(pb));
2121 printk(", using FIFO");
2125 #endif /* Allowed to use FIFO/DMA */