Lines Matching refs:CTL_REG
59 #define CTL_REG(offset) ((zd_addr_t)(CR_START + (offset)))
64 #define CR0 CTL_REG(0x0000)
65 #define CR1 CTL_REG(0x0004)
66 #define CR2 CTL_REG(0x0008)
67 #define CR3 CTL_REG(0x000C)
69 #define CR5 CTL_REG(0x0010)
73 #define CR6 CTL_REG(0x0014)
74 #define CR7 CTL_REG(0x0018)
75 #define CR8 CTL_REG(0x001C)
77 #define CR4 CTL_REG(0x0020)
79 #define CR9 CTL_REG(0x0024)
81 #define CR10 CTL_REG(0x0028)
85 #define CR11 CTL_REG(0x002C)
89 #define CR12 CTL_REG(0x0030)
90 #define CR13 CTL_REG(0x0034)
91 #define CR14 CTL_REG(0x0038)
92 #define CR15 CTL_REG(0x003C)
93 #define CR16 CTL_REG(0x0040)
94 #define CR17 CTL_REG(0x0044)
95 #define CR18 CTL_REG(0x0048)
96 #define CR19 CTL_REG(0x004C)
97 #define CR20 CTL_REG(0x0050)
98 #define CR21 CTL_REG(0x0054)
99 #define CR22 CTL_REG(0x0058)
100 #define CR23 CTL_REG(0x005C)
101 #define CR24 CTL_REG(0x0060) /* CCA threshold */
102 #define CR25 CTL_REG(0x0064)
103 #define CR26 CTL_REG(0x0068)
104 #define CR27 CTL_REG(0x006C)
105 #define CR28 CTL_REG(0x0070)
106 #define CR29 CTL_REG(0x0074)
107 #define CR30 CTL_REG(0x0078)
108 #define CR31 CTL_REG(0x007C) /* TX power control for RF in CCK mode */
109 #define CR32 CTL_REG(0x0080)
110 #define CR33 CTL_REG(0x0084)
111 #define CR34 CTL_REG(0x0088)
112 #define CR35 CTL_REG(0x008C)
113 #define CR36 CTL_REG(0x0090)
114 #define CR37 CTL_REG(0x0094)
115 #define CR38 CTL_REG(0x0098)
116 #define CR39 CTL_REG(0x009C)
117 #define CR40 CTL_REG(0x00A0)
118 #define CR41 CTL_REG(0x00A4)
119 #define CR42 CTL_REG(0x00A8)
120 #define CR43 CTL_REG(0x00AC)
121 #define CR44 CTL_REG(0x00B0)
122 #define CR45 CTL_REG(0x00B4)
123 #define CR46 CTL_REG(0x00B8)
124 #define CR47 CTL_REG(0x00BC) /* CCK baseband gain
127 #define CR48 CTL_REG(0x00C0)
128 #define CR49 CTL_REG(0x00C4)
129 #define CR50 CTL_REG(0x00C8)
130 #define CR51 CTL_REG(0x00CC) /* TX power control for RF in 6-36M modes */
131 #define CR52 CTL_REG(0x00D0) /* TX power control for RF in 48M mode */
132 #define CR53 CTL_REG(0x00D4) /* TX power control for RF in 54M mode */
133 #define CR54 CTL_REG(0x00D8)
134 #define CR55 CTL_REG(0x00DC)
135 #define CR56 CTL_REG(0x00E0)
136 #define CR57 CTL_REG(0x00E4)
137 #define CR58 CTL_REG(0x00E8)
138 #define CR59 CTL_REG(0x00EC)
139 #define CR60 CTL_REG(0x00F0)
140 #define CR61 CTL_REG(0x00F4)
141 #define CR62 CTL_REG(0x00F8)
142 #define CR63 CTL_REG(0x00FC)
143 #define CR64 CTL_REG(0x0100)
144 #define CR65 CTL_REG(0x0104) /* OFDM 54M calibration */
145 #define CR66 CTL_REG(0x0108) /* OFDM 48M calibration */
146 #define CR67 CTL_REG(0x010C) /* OFDM 36M calibration */
147 #define CR68 CTL_REG(0x0110) /* CCK calibration */
148 #define CR69 CTL_REG(0x0114)
149 #define CR70 CTL_REG(0x0118)
150 #define CR71 CTL_REG(0x011C)
151 #define CR72 CTL_REG(0x0120)
152 #define CR73 CTL_REG(0x0124)
153 #define CR74 CTL_REG(0x0128)
154 #define CR75 CTL_REG(0x012C)
155 #define CR76 CTL_REG(0x0130)
156 #define CR77 CTL_REG(0x0134)
157 #define CR78 CTL_REG(0x0138)
158 #define CR79 CTL_REG(0x013C)
159 #define CR80 CTL_REG(0x0140)
160 #define CR81 CTL_REG(0x0144)
161 #define CR82 CTL_REG(0x0148)
162 #define CR83 CTL_REG(0x014C)
163 #define CR84 CTL_REG(0x0150)
164 #define CR85 CTL_REG(0x0154)
165 #define CR86 CTL_REG(0x0158)
166 #define CR87 CTL_REG(0x015C)
167 #define CR88 CTL_REG(0x0160)
168 #define CR89 CTL_REG(0x0164)
169 #define CR90 CTL_REG(0x0168)
170 #define CR91 CTL_REG(0x016C)
171 #define CR92 CTL_REG(0x0170)
172 #define CR93 CTL_REG(0x0174)
173 #define CR94 CTL_REG(0x0178)
174 #define CR95 CTL_REG(0x017C)
175 #define CR96 CTL_REG(0x0180)
176 #define CR97 CTL_REG(0x0184)
177 #define CR98 CTL_REG(0x0188)
178 #define CR99 CTL_REG(0x018C)
179 #define CR100 CTL_REG(0x0190)
180 #define CR101 CTL_REG(0x0194)
181 #define CR102 CTL_REG(0x0198)
182 #define CR103 CTL_REG(0x019C)
183 #define CR104 CTL_REG(0x01A0)
184 #define CR105 CTL_REG(0x01A4)
185 #define CR106 CTL_REG(0x01A8)
186 #define CR107 CTL_REG(0x01AC)
187 #define CR108 CTL_REG(0x01B0)
188 #define CR109 CTL_REG(0x01B4)
189 #define CR110 CTL_REG(0x01B8)
190 #define CR111 CTL_REG(0x01BC)
191 #define CR112 CTL_REG(0x01C0)
192 #define CR113 CTL_REG(0x01C4)
193 #define CR114 CTL_REG(0x01C8)
194 #define CR115 CTL_REG(0x01CC)
195 #define CR116 CTL_REG(0x01D0)
196 #define CR117 CTL_REG(0x01D4)
197 #define CR118 CTL_REG(0x01D8)
198 #define CR119 CTL_REG(0x01DC)
199 #define CR120 CTL_REG(0x01E0)
200 #define CR121 CTL_REG(0x01E4)
201 #define CR122 CTL_REG(0x01E8)
202 #define CR123 CTL_REG(0x01EC)
203 #define CR124 CTL_REG(0x01F0)
204 #define CR125 CTL_REG(0x01F4)
205 #define CR126 CTL_REG(0x01F8)
206 #define CR127 CTL_REG(0x01FC)
207 #define CR128 CTL_REG(0x0200)
208 #define CR129 CTL_REG(0x0204)
209 #define CR130 CTL_REG(0x0208)
210 #define CR131 CTL_REG(0x020C)
211 #define CR132 CTL_REG(0x0210)
212 #define CR133 CTL_REG(0x0214)
213 #define CR134 CTL_REG(0x0218)
214 #define CR135 CTL_REG(0x021C)
215 #define CR136 CTL_REG(0x0220)
216 #define CR137 CTL_REG(0x0224)
217 #define CR138 CTL_REG(0x0228)
218 #define CR139 CTL_REG(0x022C)
219 #define CR140 CTL_REG(0x0230)
220 #define CR141 CTL_REG(0x0234)
221 #define CR142 CTL_REG(0x0238)
222 #define CR143 CTL_REG(0x023C)
223 #define CR144 CTL_REG(0x0240)
224 #define CR145 CTL_REG(0x0244)
225 #define CR146 CTL_REG(0x0248)
226 #define CR147 CTL_REG(0x024C)
227 #define CR148 CTL_REG(0x0250)
228 #define CR149 CTL_REG(0x0254)
229 #define CR150 CTL_REG(0x0258)
230 #define CR151 CTL_REG(0x025C)
231 #define CR152 CTL_REG(0x0260)
232 #define CR153 CTL_REG(0x0264)
233 #define CR154 CTL_REG(0x0268)
234 #define CR155 CTL_REG(0x026C)
235 #define CR156 CTL_REG(0x0270)
236 #define CR157 CTL_REG(0x0274)
237 #define CR158 CTL_REG(0x0278)
238 #define CR159 CTL_REG(0x027C)
239 #define CR160 CTL_REG(0x0280)
240 #define CR161 CTL_REG(0x0284)
241 #define CR162 CTL_REG(0x0288)
242 #define CR163 CTL_REG(0x028C)
243 #define CR164 CTL_REG(0x0290)
244 #define CR165 CTL_REG(0x0294)
245 #define CR166 CTL_REG(0x0298)
246 #define CR167 CTL_REG(0x029C)
247 #define CR168 CTL_REG(0x02A0)
248 #define CR169 CTL_REG(0x02A4)
249 #define CR170 CTL_REG(0x02A8)
250 #define CR171 CTL_REG(0x02AC)
251 #define CR172 CTL_REG(0x02B0)
252 #define CR173 CTL_REG(0x02B4)
253 #define CR174 CTL_REG(0x02B8)
254 #define CR175 CTL_REG(0x02BC)
255 #define CR176 CTL_REG(0x02C0)
256 #define CR177 CTL_REG(0x02C4)
257 #define CR178 CTL_REG(0x02C8)
258 #define CR179 CTL_REG(0x02CC)
259 #define CR180 CTL_REG(0x02D0)
260 #define CR181 CTL_REG(0x02D4)
261 #define CR182 CTL_REG(0x02D8)
262 #define CR183 CTL_REG(0x02DC)
263 #define CR184 CTL_REG(0x02E0)
264 #define CR185 CTL_REG(0x02E4)
265 #define CR186 CTL_REG(0x02E8)
266 #define CR187 CTL_REG(0x02EC)
267 #define CR188 CTL_REG(0x02F0)
268 #define CR189 CTL_REG(0x02F4)
269 #define CR190 CTL_REG(0x02F8)
270 #define CR191 CTL_REG(0x02FC)
271 #define CR192 CTL_REG(0x0300)
272 #define CR193 CTL_REG(0x0304)
273 #define CR194 CTL_REG(0x0308)
274 #define CR195 CTL_REG(0x030C)
275 #define CR196 CTL_REG(0x0310)
276 #define CR197 CTL_REG(0x0314)
277 #define CR198 CTL_REG(0x0318)
278 #define CR199 CTL_REG(0x031C)
279 #define CR200 CTL_REG(0x0320)
280 #define CR201 CTL_REG(0x0324)
281 #define CR202 CTL_REG(0x0328)
282 #define CR203 CTL_REG(0x032C) /* I2C bus template value & flash control */
283 #define CR204 CTL_REG(0x0330)
284 #define CR205 CTL_REG(0x0334)
285 #define CR206 CTL_REG(0x0338)
286 #define CR207 CTL_REG(0x033C)
287 #define CR208 CTL_REG(0x0340)
288 #define CR209 CTL_REG(0x0344)
289 #define CR210 CTL_REG(0x0348)
290 #define CR211 CTL_REG(0x034C)
291 #define CR212 CTL_REG(0x0350)
292 #define CR213 CTL_REG(0x0354)
293 #define CR214 CTL_REG(0x0358)
294 #define CR215 CTL_REG(0x035C)
295 #define CR216 CTL_REG(0x0360)
296 #define CR217 CTL_REG(0x0364)
297 #define CR218 CTL_REG(0x0368)
298 #define CR219 CTL_REG(0x036C)
299 #define CR220 CTL_REG(0x0370)
300 #define CR221 CTL_REG(0x0374)
301 #define CR222 CTL_REG(0x0378)
302 #define CR223 CTL_REG(0x037C)
303 #define CR224 CTL_REG(0x0380)
304 #define CR225 CTL_REG(0x0384)
305 #define CR226 CTL_REG(0x0388)
306 #define CR227 CTL_REG(0x038C)
307 #define CR228 CTL_REG(0x0390)
308 #define CR229 CTL_REG(0x0394)
309 #define CR230 CTL_REG(0x0398)
310 #define CR231 CTL_REG(0x039C)
311 #define CR232 CTL_REG(0x03A0)
312 #define CR233 CTL_REG(0x03A4)
313 #define CR234 CTL_REG(0x03A8)
314 #define CR235 CTL_REG(0x03AC)
315 #define CR236 CTL_REG(0x03B0)
317 #define CR240 CTL_REG(0x03C0)
322 #define CR241 CTL_REG(0x03C4)
323 #define CR242 CTL_REG(0x03C8)
324 #define CR243 CTL_REG(0x03CC)
325 #define CR244 CTL_REG(0x03D0)
326 #define CR245 CTL_REG(0x03D4)
328 #define CR251 CTL_REG(0x03EC) /* only used for activation and deactivation of
331 #define CR252 CTL_REG(0x03F0)
332 #define CR253 CTL_REG(0x03F4)
333 #define CR254 CTL_REG(0x03F8)
334 #define CR255 CTL_REG(0x03FC)
342 #define CR_RF_IF_CLK CTL_REG(0x0400)
343 #define CR_RF_IF_DATA CTL_REG(0x0404)
344 #define CR_PE1_PE2 CTL_REG(0x0408)
345 #define CR_PE2_DLY CTL_REG(0x040C)
346 #define CR_LE1 CTL_REG(0x0410)
347 #define CR_LE2 CTL_REG(0x0414)
349 #define CR_GPI_EN CTL_REG(0x0418)
350 #define CR_RADIO_PD CTL_REG(0x042C)
351 #define CR_RF2948_PD CTL_REG(0x042C)
352 #define CR_ENABLE_PS_MANUAL_AGC CTL_REG(0x043C)
353 #define CR_CONFIG_PHILIPS CTL_REG(0x0440)
354 #define CR_SA2400_SER_AP CTL_REG(0x0444)
355 #define CR_I2C_WRITE CTL_REG(0x0444)
356 #define CR_SA2400_SER_RP CTL_REG(0x0448)
357 #define CR_RADIO_PE CTL_REG(0x0458)
358 #define CR_RST_BUS_MASTER CTL_REG(0x045C)
359 #define CR_RFCFG CTL_REG(0x0464)
360 #define CR_HSTSCHG CTL_REG(0x046C)
361 #define CR_PHY_ON CTL_REG(0x0474)
362 #define CR_RX_DELAY CTL_REG(0x0478)
363 #define CR_RX_PE_DELAY CTL_REG(0x047C)
364 #define CR_GPIO_1 CTL_REG(0x0490)
365 #define CR_GPIO_2 CTL_REG(0x0494)
366 #define CR_EncryBufMux CTL_REG(0x04A8)
367 #define CR_PS_CTRL CTL_REG(0x0500)
368 #define CR_ADDA_PWR_DWN CTL_REG(0x0504)
369 #define CR_ADDA_MBIAS_WARMTIME CTL_REG(0x0508)
370 #define CR_MAC_PS_STATE CTL_REG(0x050C)
372 #define CR_INTERRUPT CTL_REG(0x0510)
392 #define CR_TSF_LOW_PART CTL_REG(0x0514)
393 #define CR_TSF_HIGH_PART CTL_REG(0x0518)
399 #define CR_ATIM_WND_PERIOD CTL_REG(0x051C)
400 #define CR_BCN_INTERVAL CTL_REG(0x0520)
401 #define CR_PRE_TBTT CTL_REG(0x0524)
405 #define CR_UART_RBR_THR_DLL CTL_REG(0x0540)
406 #define CR_UART_DLM_IER CTL_REG(0x0544)
407 #define CR_UART_IIR_FCR CTL_REG(0x0548)
408 #define CR_UART_LCR CTL_REG(0x054c)
409 #define CR_UART_MCR CTL_REG(0x0550)
410 #define CR_UART_LSR CTL_REG(0x0554)
411 #define CR_UART_MSR CTL_REG(0x0558)
412 #define CR_UART_ECR CTL_REG(0x055c)
413 #define CR_UART_STATUS CTL_REG(0x0560)
415 #define CR_PCI_TX_ADDR_P1 CTL_REG(0x0600)
416 #define CR_PCI_TX_AddR_P2 CTL_REG(0x0604)
417 #define CR_PCI_RX_AddR_P1 CTL_REG(0x0608)
418 #define CR_PCI_RX_AddR_P2 CTL_REG(0x060C)
421 #define CR_MAC_ADDR_P1 CTL_REG(0x0610)
422 #define CR_MAC_ADDR_P2 CTL_REG(0x0614)
423 #define CR_BSSID_P1 CTL_REG(0x0618)
424 #define CR_BSSID_P2 CTL_REG(0x061C)
425 #define CR_BCN_PLCP_CFG CTL_REG(0x0620)
435 #define CR_GROUP_HASH_P1 CTL_REG(0x0624)
436 #define CR_GROUP_HASH_P2 CTL_REG(0x0628)
438 #define CR_RX_TIMEOUT CTL_REG(0x062C)
443 #define CR_BASIC_RATE_TBL CTL_REG(0x0630)
463 #define CR_MANDATORY_RATE_TBL CTL_REG(0x0634)
464 #define CR_RTS_CTS_RATE CTL_REG(0x0638)
475 #define CR_WEP_PROTECT CTL_REG(0x063C)
476 #define CR_RX_THRESHOLD CTL_REG(0x0640)
479 #define CR_LED CTL_REG(0x0644)
487 #define CR_AFTER_PNP CTL_REG(0x0648)
488 #define CR_ACK_TIME_80211 CTL_REG(0x0658)
490 #define CR_RX_OFFSET CTL_REG(0x065c)
492 #define CR_BCN_LENGTH CTL_REG(0x0664)
493 #define CR_PHY_DELAY CTL_REG(0x066C)
494 #define CR_BCN_FIFO CTL_REG(0x0670)
495 #define CR_SNIFFER_ON CTL_REG(0x0674)
497 #define CR_ENCRYPTION_TYPE CTL_REG(0x0678)
504 #define CR_ZD1211_RETRY_MAX CTL_REG(0x067C)
506 #define CR_REG1 CTL_REG(0x0680)
513 #define CR_DEVICE_STATE CTL_REG(0x0684)
514 #define CR_UNDERRUN_CNT CTL_REG(0x0688)
516 #define CR_RX_FILTER CTL_REG(0x068c)
553 #define CR_ACK_TIMEOUT_EXT CTL_REG(0x0690)
554 #define CR_BCN_FIFO_SEMAPHORE CTL_REG(0x0694)
556 #define CR_IFS_VALUE CTL_REG(0x0698)
564 #define CR_RX_TIME_OUT CTL_REG(0x069C)
565 #define CR_TOTAL_RX_FRM CTL_REG(0x06A0)
566 #define CR_CRC32_CNT CTL_REG(0x06A4)
567 #define CR_CRC16_CNT CTL_REG(0x06A8)
568 #define CR_DECRYPTION_ERR_UNI CTL_REG(0x06AC)
569 #define CR_RX_FIFO_OVERRUN CTL_REG(0x06B0)
571 #define CR_DECRYPTION_ERR_MUL CTL_REG(0x06BC)
573 #define CR_NAV_CNT CTL_REG(0x06C4)
574 #define CR_NAV_CCA CTL_REG(0x06C8)
575 #define CR_RETRY_CNT CTL_REG(0x06CC)
577 #define CR_READ_TCB_ADDR CTL_REG(0x06E8)
578 #define CR_READ_RFD_ADDR CTL_REG(0x06EC)
579 #define CR_CWMIN_CWMAX CTL_REG(0x06F0)
580 #define CR_TOTAL_TX_FRM CTL_REG(0x06F4)
583 #define CR_CAM_MODE CTL_REG(0x0700)
589 #define CR_CAM_ROLL_TB_LOW CTL_REG(0x0704)
590 #define CR_CAM_ROLL_TB_HIGH CTL_REG(0x0708)
591 #define CR_CAM_ADDRESS CTL_REG(0x070C)
592 #define CR_CAM_DATA CTL_REG(0x0710)
594 #define CR_ROMDIR CTL_REG(0x0714)
596 #define CR_DECRY_ERR_FLG_LOW CTL_REG(0x0714)
597 #define CR_DECRY_ERR_FLG_HIGH CTL_REG(0x0718)
599 #define CR_WEPKEY0 CTL_REG(0x0720)
600 #define CR_WEPKEY1 CTL_REG(0x0724)
601 #define CR_WEPKEY2 CTL_REG(0x0728)
602 #define CR_WEPKEY3 CTL_REG(0x072C)
603 #define CR_WEPKEY4 CTL_REG(0x0730)
604 #define CR_WEPKEY5 CTL_REG(0x0734)
605 #define CR_WEPKEY6 CTL_REG(0x0738)
606 #define CR_WEPKEY7 CTL_REG(0x073C)
607 #define CR_WEPKEY8 CTL_REG(0x0740)
608 #define CR_WEPKEY9 CTL_REG(0x0744)
609 #define CR_WEPKEY10 CTL_REG(0x0748)
610 #define CR_WEPKEY11 CTL_REG(0x074C)
611 #define CR_WEPKEY12 CTL_REG(0x0750)
612 #define CR_WEPKEY13 CTL_REG(0x0754)
613 #define CR_WEPKEY14 CTL_REG(0x0758)
614 #define CR_WEPKEY15 CTL_REG(0x075c)
615 #define CR_TKIP_MODE CTL_REG(0x0760)
617 #define CR_EEPROM_PROTECT0 CTL_REG(0x0758)
618 #define CR_EEPROM_PROTECT1 CTL_REG(0x075C)
620 #define CR_DBG_FIFO_RD CTL_REG(0x0800)
621 #define CR_DBG_SELECT CTL_REG(0x0804)
622 #define CR_FIFO_Length CTL_REG(0x0808)
625 #define CR_RSSI_MGC CTL_REG(0x0810)
627 #define CR_PON CTL_REG(0x0818)
628 #define CR_RX_ON CTL_REG(0x081C)
629 #define CR_TX_ON CTL_REG(0x0820)
630 #define CR_CHIP_EN CTL_REG(0x0824)
631 #define CR_LO_SW CTL_REG(0x0828)
632 #define CR_TXRX_SW CTL_REG(0x082C)
633 #define CR_S_MD CTL_REG(0x0830)
635 #define CR_USB_DEBUG_PORT CTL_REG(0x0888)
636 #define CR_ZD1211B_CWIN_MAX_MIN_AC0 CTL_REG(0x0b00)
637 #define CR_ZD1211B_CWIN_MAX_MIN_AC1 CTL_REG(0x0b04)
638 #define CR_ZD1211B_CWIN_MAX_MIN_AC2 CTL_REG(0x0b08)
639 #define CR_ZD1211B_CWIN_MAX_MIN_AC3 CTL_REG(0x0b0c)
640 #define CR_ZD1211B_AIFS_CTL1 CTL_REG(0x0b10)
641 #define CR_ZD1211B_AIFS_CTL2 CTL_REG(0x0b14)
642 #define CR_ZD1211B_TXOP CTL_REG(0x0b20)
643 #define CR_ZD1211B_RETRY_MAX CTL_REG(0x0b28)