Lines Matching refs:rt2x00_set_field32
128 rt2x00_set_field32(®, MAC_SYS_CTRL_ENABLE_RX,
158 rt2x00_set_field32(®, MAC_SYS_CTRL_RESET_CSR, 1);
159 rt2x00_set_field32(®, MAC_SYS_CTRL_RESET_BBP, 1);
187 rt2x00_set_field32(®, MAC_SYS_CTRL_ENABLE_TX, 1);
193 rt2x00_set_field32(®, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
194 rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_RX_DMA, 1);
195 rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_TX_DMA, 1);
200 rt2x00_set_field32(®, USB_DMA_CFG_PHY_CLEAR, 0);
201 rt2x00_set_field32(®, USB_DMA_CFG_RX_BULK_AGG_EN, 0);
202 rt2x00_set_field32(®, USB_DMA_CFG_RX_BULK_AGG_TIMEOUT, 128);
207 rt2x00_set_field32(®, USB_DMA_CFG_RX_BULK_AGG_LIMIT,
209 rt2x00_set_field32(®, USB_DMA_CFG_RX_BULK_EN, 1);
210 rt2x00_set_field32(®, USB_DMA_CFG_TX_BULK_EN, 1);
214 rt2x00_set_field32(®, MAC_SYS_CTRL_ENABLE_TX, 1);
215 rt2x00_set_field32(®, MAC_SYS_CTRL_ENABLE_RX, 1);
241 rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
242 rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
344 rt2x00_set_field32(&word, TXINFO_W0_USB_DMA_TX_PKT_LEN,
346 rt2x00_set_field32(&word, TXINFO_W0_WIV,
348 rt2x00_set_field32(&word, TXINFO_W0_QSEL, 2);
349 rt2x00_set_field32(&word, TXINFO_W0_SW_USE_LAST_ROUND, 0);
350 rt2x00_set_field32(&word, TXINFO_W0_USB_DMA_NEXT_VALID, 0);
351 rt2x00_set_field32(&word, TXINFO_W0_USB_DMA_TX_BURST,