Lines Matching refs:rt2x00_set_field32
121 rt2x00_set_field32(®, E2PROM_CSR_DATA_IN, !!eeprom->reg_data_in);
122 rt2x00_set_field32(®, E2PROM_CSR_DATA_OUT, !!eeprom->reg_data_out);
123 rt2x00_set_field32(®, E2PROM_CSR_DATA_CLOCK,
125 rt2x00_set_field32(®, E2PROM_CSR_CHIP_SELECT,
205 rt2x00_set_field32(®, PBF_SYS_CTRL_HOST_RAM_WRITE, 1);
250 rt2x00_set_field32(&word, RXD_W0_SDP0, skbdesc->skb_dma);
254 rt2x00_set_field32(&word, RXD_W1_DMA_DONE, 0);
258 rt2x00_set_field32(&word, TXD_W1_DMA_DONE, 1);
305 rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
306 rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
307 rt2x00_set_field32(®, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
324 rt2x00_set_field32(®, MAC_SYS_CTRL_ENABLE_RX,
347 rt2x00_set_field32(®, INT_MASK_CSR_RXDELAYINT, mask);
348 rt2x00_set_field32(®, INT_MASK_CSR_TXDELAYINT, mask);
349 rt2x00_set_field32(®, INT_MASK_CSR_RX_DONE, mask);
350 rt2x00_set_field32(®, INT_MASK_CSR_AC0_DMA_DONE, mask);
351 rt2x00_set_field32(®, INT_MASK_CSR_AC1_DMA_DONE, mask);
352 rt2x00_set_field32(®, INT_MASK_CSR_AC2_DMA_DONE, mask);
353 rt2x00_set_field32(®, INT_MASK_CSR_AC3_DMA_DONE, mask);
354 rt2x00_set_field32(®, INT_MASK_CSR_HCCA_DMA_DONE, mask);
355 rt2x00_set_field32(®, INT_MASK_CSR_MGMT_DMA_DONE, mask);
356 rt2x00_set_field32(®, INT_MASK_CSR_MCU_COMMAND, mask);
357 rt2x00_set_field32(®, INT_MASK_CSR_RXTX_COHERENT, mask);
358 rt2x00_set_field32(®, INT_MASK_CSR_TBTT, mask);
359 rt2x00_set_field32(®, INT_MASK_CSR_PRE_TBTT, mask);
360 rt2x00_set_field32(®, INT_MASK_CSR_TX_FIFO_STATUS, mask);
361 rt2x00_set_field32(®, INT_MASK_CSR_AUTO_WAKEUP, mask);
362 rt2x00_set_field32(®, INT_MASK_CSR_GPTIMER, mask);
363 rt2x00_set_field32(®, INT_MASK_CSR_RX_COHERENT, mask);
364 rt2x00_set_field32(®, INT_MASK_CSR_TX_COHERENT, mask);
376 rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX0, 1);
377 rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX1, 1);
378 rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX2, 1);
379 rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX3, 1);
380 rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX4, 1);
381 rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX5, 1);
382 rt2x00_set_field32(®, WPDMA_RST_IDX_DRX_IDX0, 1);
391 rt2x00_set_field32(®, MAC_SYS_CTRL_RESET_CSR, 1);
392 rt2x00_set_field32(®, MAC_SYS_CTRL_RESET_BBP, 1);
425 rt2x00_set_field32(®, MAC_SYS_CTRL_ENABLE_TX, 1);
426 rt2x00_set_field32(®, MAC_SYS_CTRL_ENABLE_RX, 0);
430 rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_TX_DMA, 1);
431 rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_RX_DMA, 1);
432 rt2x00_set_field32(®, WPDMA_GLO_CFG_WP_DMA_BURST_SIZE, 2);
433 rt2x00_set_field32(®, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
437 rt2x00_set_field32(®, MAC_SYS_CTRL_ENABLE_TX, 1);
438 rt2x00_set_field32(®, MAC_SYS_CTRL_ENABLE_RX, 1);
464 rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
465 rt2x00_set_field32(®, WPDMA_GLO_CFG_TX_DMA_BUSY, 0);
466 rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
467 rt2x00_set_field32(®, WPDMA_GLO_CFG_RX_DMA_BUSY, 0);
468 rt2x00_set_field32(®, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
478 rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX0, 1);
479 rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX1, 1);
480 rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX2, 1);
481 rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX3, 1);
482 rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX4, 1);
483 rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX5, 1);
484 rt2x00_set_field32(®, WPDMA_RST_IDX_DRX_IDX0, 1);
599 rt2x00_set_field32(&word, TXD_W0_SD_PTR0, skbdesc->skb_dma);
603 rt2x00_set_field32(&word, TXD_W1_SD_LEN1, skb->len);
604 rt2x00_set_field32(&word, TXD_W1_LAST_SEC1,
606 rt2x00_set_field32(&word, TXD_W1_BURST,
608 rt2x00_set_field32(&word, TXD_W1_SD_LEN0, TXWI_DESC_SIZE);
609 rt2x00_set_field32(&word, TXD_W1_LAST_SEC0, 0);
610 rt2x00_set_field32(&word, TXD_W1_DMA_DONE, 0);
614 rt2x00_set_field32(&word, TXD_W2_SD_PTR1,
619 rt2x00_set_field32(&word, TXD_W3_WIV,
621 rt2x00_set_field32(&word, TXD_W3_QSEL, 2);
665 rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX0, (qid == QID_AC_BE));
666 rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX1, (qid == QID_AC_BK));
667 rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX2, (qid == QID_AC_VI));
668 rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX3, (qid == QID_AC_VO));