Lines Matching refs:word
59 const unsigned int word, const u8 value)
72 rt2x00_set_field32(®, BBPCSR_REGNUM, word);
83 const unsigned int word, u8 *value)
99 rt2x00_set_field32(®, BBPCSR_REGNUM, word);
114 const unsigned int word, const u32 value)
132 rt2x00_rf_write(rt2x00dev, word, value);
627 u32 word;
630 rt2x00_desc_read(entry_priv->desc, 0, &word);
632 return rt2x00_get_field32(word, RXD_W0_OWNER_NIC);
634 rt2x00_desc_read(entry_priv->desc, 0, &word);
636 return (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) ||
637 rt2x00_get_field32(word, TXD_W0_VALID));
645 u32 word;
648 rt2x00_desc_read(entry_priv->desc, 2, &word);
649 rt2x00_set_field32(&word, RXD_W2_BUFFER_LENGTH, entry->skb->len);
650 rt2x00_desc_write(entry_priv->desc, 2, word);
652 rt2x00_desc_read(entry_priv->desc, 1, &word);
653 rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma);
654 rt2x00_desc_write(entry_priv->desc, 1, word);
656 rt2x00_desc_read(entry_priv->desc, 0, &word);
657 rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1);
658 rt2x00_desc_write(entry_priv->desc, 0, word);
660 rt2x00_desc_read(entry_priv->desc, 0, &word);
661 rt2x00_set_field32(&word, TXD_W0_VALID, 0);
662 rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0);
663 rt2x00_desc_write(entry_priv->desc, 0, word);
1017 u32 word;
1022 rt2x00_desc_read(txd, 1, &word);
1023 rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma);
1024 rt2x00_desc_write(txd, 1, word);
1026 rt2x00_desc_read(txd, 2, &word);
1027 rt2x00_set_field32(&word, TXD_W2_BUFFER_LENGTH, txdesc->length);
1028 rt2x00_set_field32(&word, TXD_W2_DATABYTE_COUNT, txdesc->length);
1029 rt2x00_desc_write(txd, 2, word);
1031 rt2x00_desc_read(txd, 3, &word);
1032 rt2x00_set_field32(&word, TXD_W3_PLCP_SIGNAL, txdesc->signal);
1033 rt2x00_set_field32(&word, TXD_W3_PLCP_SIGNAL_REGNUM, 5);
1034 rt2x00_set_field32(&word, TXD_W3_PLCP_SIGNAL_BUSY, 1);
1035 rt2x00_set_field32(&word, TXD_W3_PLCP_SERVICE, txdesc->service);
1036 rt2x00_set_field32(&word, TXD_W3_PLCP_SERVICE_REGNUM, 6);
1037 rt2x00_set_field32(&word, TXD_W3_PLCP_SERVICE_BUSY, 1);
1038 rt2x00_desc_write(txd, 3, word);
1040 rt2x00_desc_read(txd, 4, &word);
1041 rt2x00_set_field32(&word, TXD_W4_PLCP_LENGTH_LOW, txdesc->length_low);
1042 rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_LOW_REGNUM, 8);
1043 rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_LOW_BUSY, 1);
1044 rt2x00_set_field32(&word, TXD_W4_PLCP_LENGTH_HIGH, txdesc->length_high);
1045 rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_HIGH_REGNUM, 7);
1046 rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_HIGH_BUSY, 1);
1047 rt2x00_desc_write(txd, 4, word);
1050 * Writing TXD word 0 must the last to prevent a race condition with
1054 rt2x00_desc_read(txd, 0, &word);
1055 rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 1);
1056 rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1057 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1059 rt2x00_set_field32(&word, TXD_W0_ACK,
1061 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1063 rt2x00_set_field32(&word, TXD_W0_RTS,
1065 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1066 rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
1068 rt2x00_desc_write(txd, 0, word);
1209 u32 word;
1214 rt2x00_desc_read(entry_priv->desc, 0, &word);
1216 if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) ||
1217 !rt2x00_get_field32(word, TXD_W0_VALID))
1224 switch (rt2x00_get_field32(word, TXD_W0_RESULT)) {
1235 txdesc.retry = rt2x00_get_field32(word, TXD_W0_RETRY_COUNT);
1323 u16 word;
1350 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1351 if (word == 0xffff) {
1366 * Read EEPROM word for configuration.