Lines Matching refs:NET2280_DEV_U32
317 reg->port = cpu_to_le16(NET2280_DEV_U32);
695 P54U_WRITE(NET2280_DEV_U32, &devreg->int_enable, 0);
697 P54U_READ(NET2280_DEV_U32, &devreg->ctrl_stat);
701 P54U_WRITE(NET2280_DEV_U32, &devreg->ctrl_stat, reg);
706 P54U_WRITE(NET2280_DEV_U32, &devreg->ctrl_stat, reg);
711 P54U_WRITE(NET2280_DEV_U32, &devreg->ctrl_stat, reg);
715 P54U_READ(NET2280_DEV_U32, &devreg->int_ident);
716 P54U_WRITE(NET2280_DEV_U32, &devreg->int_ack, reg);
734 P54U_WRITE(NET2280_DEV_U32, &devreg->direct_mem_base,
737 P54U_WRITE(NET2280_DEV_U32,
739 P54U_WRITE(NET2280_DEV_U32,
743 P54U_WRITE(NET2280_DEV_U32,
746 P54U_WRITE(NET2280_DEV_U32,
750 P54U_WRITE(NET2280_DEV_U32, &devreg->dma_addr,
752 P54U_WRITE(NET2280_DEV_U32, &devreg->dma_len,
754 P54U_WRITE(NET2280_DEV_U32, &devreg->dma_ctrl,
759 P54U_READ(NET2280_DEV_U32,
777 P54U_READ(NET2280_DEV_U32, &devreg->ctrl_stat);
781 P54U_WRITE(NET2280_DEV_U32, &devreg->ctrl_stat, reg);
786 P54U_WRITE(NET2280_DEV_U32, &devreg->ctrl_stat, reg);
789 P54U_WRITE(NET2280_DEV_U32, &devreg->ctrl_stat, reg);
793 P54U_READ(NET2280_DEV_U32, &devreg->int_ident);
794 P54U_WRITE(NET2280_DEV_U32, &devreg->int_ack, reg);
797 P54U_WRITE(NET2280_DEV_U32, &devreg->int_enable,
807 P54U_WRITE(NET2280_DEV_U32, &devreg->dev_int,
816 P54U_READ(NET2280_DEV_U32, &devreg->int_ident);
817 P54U_WRITE(NET2280_DEV_U32, &devreg->int_ack, reg);