Lines Matching refs:inta
1633 u32 inta, handled = 0;
1645 inta = iwl_read32(priv, CSR_INT);
1646 iwl_write32(priv, CSR_INT, inta);
1658 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1659 inta, inta_mask, inta_fh);
1666 * atomic, make sure that inta covers all the interrupts that
1670 inta |= CSR_INT_BIT_FH_RX;
1672 inta |= CSR_INT_BIT_FH_TX;
1675 if (inta & CSR_INT_BIT_HW_ERR) {
1692 if (inta & CSR_INT_BIT_SCD) {
1699 if (inta & CSR_INT_BIT_ALIVE) {
1706 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1709 if (inta & CSR_INT_BIT_SW_ERR) {
1711 "Restarting 0x%X.\n", inta);
1713 priv->isr_stats.sw_err = inta;
1719 if (inta & CSR_INT_BIT_WAKEUP) {
1736 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1742 if (inta & CSR_INT_BIT_FH_TX) {
1752 if (inta & ~handled) {
1753 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1757 if (inta & ~priv->inta_mask) {
1759 inta & ~priv->inta_mask);
1770 inta = iwl_read32(priv, CSR_INT);
1773 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1774 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);