Lines Matching refs:inta
1062 u32 inta, handled = 0;
1075 inta = iwl_read32(priv, CSR_INT);
1076 iwl_write32(priv, CSR_INT, inta);
1088 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1089 inta, inta_mask, inta_fh);
1096 * atomic, make sure that inta covers all the interrupts that
1100 inta |= CSR_INT_BIT_FH_RX;
1102 inta |= CSR_INT_BIT_FH_TX;
1105 if (inta & CSR_INT_BIT_HW_ERR) {
1122 if (inta & CSR_INT_BIT_SCD) {
1129 if (inta & CSR_INT_BIT_ALIVE) {
1136 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1139 if (inta & CSR_INT_BIT_RF_KILL) {
1167 if (inta & CSR_INT_BIT_CT_KILL) {
1174 if (inta & CSR_INT_BIT_SW_ERR) {
1176 " Restarting 0x%X.\n", inta);
1178 priv->isr_stats.sw_err = inta;
1188 if (inta & CSR_INT_BIT_WAKEUP) {
1200 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1207 if (inta & CSR_INT_BIT_FH_TX) {
1216 if (inta & ~handled) {
1217 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1221 if (inta & ~(priv->inta_mask)) {
1223 inta & ~priv->inta_mask);
1237 inta = iwl_read32(priv, CSR_INT);
1240 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1241 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1249 u32 inta = 0;
1262 iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1264 inta = priv->_agn.inta;
1270 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1271 inta, inta_mask);
1277 /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1278 priv->_agn.inta = 0;
1281 if (inta & CSR_INT_BIT_HW_ERR) {
1298 if (inta & CSR_INT_BIT_SCD) {
1305 if (inta & CSR_INT_BIT_ALIVE) {
1312 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1315 if (inta & CSR_INT_BIT_RF_KILL) {
1343 if (inta & CSR_INT_BIT_CT_KILL) {
1350 if (inta & CSR_INT_BIT_SW_ERR) {
1352 " Restarting 0x%X.\n", inta);
1354 priv->isr_stats.sw_err = inta;
1360 if (inta & CSR_INT_BIT_WAKEUP) {
1374 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1377 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1382 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1409 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1417 if (inta & CSR_INT_BIT_FH_TX) {
1427 if (inta & ~handled) {
1428 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1432 if (inta & ~(priv->inta_mask)) {
1434 inta & ~priv->inta_mask);