Lines Matching refs:dflt
476 cistpl_cftable_entry_t *dflt,
484 "(default 0x%02X)\n", cfg->index, dflt->index);
501 } else if (dflt->vcc.present & (1 << CISTPL_POWER_VNOM)) {
502 if (vcc != dflt->vcc.param[CISTPL_POWER_VNOM] /
512 else if (dflt->vpp1.present & (1 << CISTPL_POWER_VNOM))
513 p_dev->conf.Vpp = dflt->vpp1.param[CISTPL_POWER_VNOM] / 10000;
520 "dflt->io.nwin=%d\n",
521 cfg->io.nwin, dflt->io.nwin);
523 if ((cfg->io.nwin > 0) || (dflt->io.nwin > 0)) {
524 cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt->io;