Lines Matching refs:sc
22 static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
24 return sc->ps_enabled &&
25 (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
28 static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
31 struct ieee80211_hw *hw = sc->pri_wiphy->hw;
34 spin_lock_bh(&sc->wiphy_lock);
35 for (i = 0; i < sc->num_sec_wiphy; i++) {
36 struct ath_wiphy *aphy = sc->sec_wiphy[i];
45 spin_unlock_bh(&sc->wiphy_lock);
57 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
59 struct ath_hw *ah = sc->sc_ah;
84 if (sc->rx.rxlink == NULL)
87 *sc->rx.rxlink = bf->bf_daddr;
89 sc->rx.rxlink = &ds->ds_link;
93 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
95 ath9k_hw_setantenna(sc->sc_ah, antenna);
96 sc->rx.defant = antenna;
97 sc->rx.rxotherant = 0;
100 static void ath_opmode_init(struct ath_softc *sc)
102 struct ath_hw *ah = sc->sc_ah;
108 rfilt = ath_calcrxfilter(sc);
123 static bool ath_rx_edma_buf_link(struct ath_softc *sc,
126 struct ath_hw *ah = sc->sc_ah;
131 rx_edma = &sc->rx.rx_edma[qtype];
135 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
142 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
152 static void ath_rx_addbuffer_edma(struct ath_softc *sc,
155 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
158 if (list_empty(&sc->rx.rxbuf)) {
163 while (!list_empty(&sc->rx.rxbuf)) {
166 if (!ath_rx_edma_buf_link(sc, qtype))
174 static void ath_rx_remove_buffer(struct ath_softc *sc,
181 rx_edma = &sc->rx.rx_edma[qtype];
186 list_add_tail(&bf->list, &sc->rx.rxbuf);
190 static void ath_rx_edma_cleanup(struct ath_softc *sc)
194 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
195 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
197 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
202 INIT_LIST_HEAD(&sc->rx.rxbuf);
204 kfree(sc->rx.rx_bufptr);
205 sc->rx.rx_bufptr = NULL;
215 static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
217 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
218 struct ath_hw *ah = sc->sc_ah;
232 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
234 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
242 INIT_LIST_HEAD(&sc->rx.rxbuf);
243 sc->rx.rx_bufptr = bf;
255 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
258 if (unlikely(dma_mapping_error(sc->dev,
268 list_add_tail(&bf->list, &sc->rx.rxbuf);
274 ath_rx_edma_cleanup(sc);
278 static void ath_edma_start_recv(struct ath_softc *sc)
280 spin_lock_bh(&sc->rx.rxbuflock);
282 ath9k_hw_rxena(sc->sc_ah);
284 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
285 sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
287 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
288 sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
290 ath_opmode_init(sc);
292 ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
294 spin_unlock_bh(&sc->rx.rxbuflock);
297 static void ath_edma_stop_recv(struct ath_softc *sc)
299 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
300 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
303 int ath_rx_init(struct ath_softc *sc, int nbufs)
305 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
310 spin_lock_init(&sc->sc_pcu_lock);
311 sc->sc_flags &= ~SC_OP_RXFLUSH;
312 spin_lock_init(&sc->rx.rxbuflock);
314 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
315 return ath_rx_edma_init(sc, nbufs);
325 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
334 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
343 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
346 if (unlikely(dma_mapping_error(sc->dev,
357 sc->rx.rxlink = NULL;
362 ath_rx_cleanup(sc);
367 void ath_rx_cleanup(struct ath_softc *sc)
369 struct ath_hw *ah = sc->sc_ah;
374 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
375 ath_rx_edma_cleanup(sc);
378 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
381 dma_unmap_single(sc->dev, bf->bf_buf_addr,
388 if (sc->rx.rxdma.dd_desc_len != 0)
389 ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
412 u32 ath_calcrxfilter(struct ath_softc *sc)
418 rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
423 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
431 if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
432 (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
433 (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR))
436 if (sc->rx.rxfilter & FIF_CONTROL)
439 if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
440 !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
445 if ((AR_SREV_9280_10_OR_LATER(sc->sc_ah) ||
446 AR_SREV_9285_10_OR_LATER(sc->sc_ah)) &&
447 (sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
448 (sc->rx.rxfilter & FIF_PSPOLL))
451 if (conf_is_ht(&sc->hw->conf))
454 if (sc->sec_wiphy || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
458 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
468 int ath_startrecv(struct ath_softc *sc)
470 struct ath_hw *ah = sc->sc_ah;
474 ath_edma_start_recv(sc);
478 spin_lock_bh(&sc->rx.rxbuflock);
479 if (list_empty(&sc->rx.rxbuf))
482 sc->rx.rxlink = NULL;
483 list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
484 ath_rx_buf_link(sc, bf);
488 if (list_empty(&sc->rx.rxbuf))
491 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
496 ath_opmode_init(sc);
497 ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
499 spin_unlock_bh(&sc->rx.rxbuflock);
504 bool ath_stoprecv(struct ath_softc *sc)
506 struct ath_hw *ah = sc->sc_ah;
509 spin_lock_bh(&sc->rx.rxbuflock);
514 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
515 ath_edma_stop_recv(sc);
517 sc->rx.rxlink = NULL;
518 spin_unlock_bh(&sc->rx.rxbuflock);
523 void ath_flushrecv(struct ath_softc *sc)
525 sc->sc_flags |= SC_OP_RXFLUSH;
526 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
527 ath_rx_tasklet(sc, 1, true);
528 ath_rx_tasklet(sc, 1, false);
529 sc->sc_flags &= ~SC_OP_RXFLUSH;
564 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
567 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
576 sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
578 if (sc->ps_flags & PS_BEACON_SYNC) {
579 sc->ps_flags &= ~PS_BEACON_SYNC;
583 ath_beacon_config(sc, NULL);
596 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
600 if (sc->ps_flags & PS_WAIT_FOR_CAB) {
606 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
612 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
615 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
620 if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
622 ath_rx_ps_beacon(sc, skb);
623 else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
632 sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
635 } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
638 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
642 sc->ps_flags & (PS_WAIT_FOR_BEACON |
650 struct ath_softc *sc, struct sk_buff *skb,
665 for (i = 0; i < sc->num_sec_wiphy; i++) {
666 struct ath_wiphy *aphy = sc->sec_wiphy[i];
675 ieee80211_rx(sc->hw, skb);
681 static bool ath_edma_get_buffers(struct ath_softc *sc,
684 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
685 struct ath_hw *ah = sc->sc_ah;
698 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
704 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
712 list_add_tail(&bf->list, &sc->rx.rxbuf);
713 ath_rx_edma_buf_link(sc, qtype);
722 list_add_tail(&bf->list, &sc->rx.rxbuf);
723 ath_rx_edma_buf_link(sc, qtype);
731 static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
735 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
739 while (ath_edma_get_buffers(sc, qtype));
745 ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
749 static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
752 struct ath_hw *ah = sc->sc_ah;
758 if (list_empty(&sc->rx.rxbuf)) {
759 sc->rx.rxlink = NULL;
763 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
784 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
785 sc->rx.rxlink = NULL;
816 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
1072 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1077 struct ath_hw *ah = sc->sc_ah;
1103 spin_lock_bh(&sc->rx.rxbuflock);
1110 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
1115 bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1117 bf = ath_get_next_rx_buf(sc, &rs);
1129 hw = ath_get_virt_hw(sc, hdr);
1131 ath_debug_stat_rx(sc, &rs);
1160 * skb and put it at the tail of the sc->rx.rxbuf list for
1166 dma_unmap_single(sc->dev, bf->bf_buf_addr,
1179 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
1182 if (unlikely(dma_mapping_error(sc->dev,
1188 ath_rx_send_to_mac80211(hw, sc, skb, rxs);
1197 if (sc->rx.defant != rs.rs_antenna) {
1198 if (++sc->rx.rxotherant >= 3)
1199 ath_setdefantenna(sc, rs.rs_antenna);
1201 sc->rx.rxotherant = 0;
1204 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1205 if (unlikely(ath9k_check_auto_sleep(sc) ||
1206 (sc->ps_flags & (PS_WAIT_FOR_BEACON |
1209 ath_rx_ps(sc, skb);
1210 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1212 ath_rx_send_to_mac80211(hw, sc, skb, rxs);
1216 list_add_tail(&bf->list, &sc->rx.rxbuf);
1217 ath_rx_edma_buf_link(sc, qtype);
1219 list_move_tail(&bf->list, &sc->rx.rxbuf);
1220 ath_rx_buf_link(sc, bf);
1224 spin_unlock_bh(&sc->rx.rxbuflock);