Lines Matching refs:qi
21 struct ath9k_tx_queue_info *qi)
154 struct ath9k_tx_queue_info *qi;
164 qi = &ah->txq[q];
165 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
241 struct ath9k_tx_queue_info *qi;
249 qi = &ah->txq[q];
250 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
258 qi->tqi_ver = qinfo->tqi_ver;
259 qi->tqi_subtype = qinfo->tqi_subtype;
260 qi->tqi_qflags = qinfo->tqi_qflags;
261 qi->tqi_priority = qinfo->tqi_priority;
263 qi->tqi_aifs = min(qinfo->tqi_aifs, 255U);
265 qi->tqi_aifs = INIT_AIFS;
268 qi->tqi_cwmin = 1;
269 while (qi->tqi_cwmin < cw)
270 qi->tqi_cwmin = (qi->tqi_cwmin << 1) | 1;
272 qi->tqi_cwmin = qinfo->tqi_cwmin;
275 qi->tqi_cwmax = 1;
276 while (qi->tqi_cwmax < cw)
277 qi->tqi_cwmax = (qi->tqi_cwmax << 1) | 1;
279 qi->tqi_cwmax = INIT_CWMAX;
282 qi->tqi_shretry = min((u32) qinfo->tqi_shretry, 15U);
284 qi->tqi_shretry = INIT_SH_RETRY;
286 qi->tqi_lgretry = min((u32) qinfo->tqi_lgretry, 15U);
288 qi->tqi_lgretry = INIT_LG_RETRY;
289 qi->tqi_cbrPeriod = qinfo->tqi_cbrPeriod;
290 qi->tqi_cbrOverflowLimit = qinfo->tqi_cbrOverflowLimit;
291 qi->tqi_burstTime = qinfo->tqi_burstTime;
292 qi->tqi_readyTime = qinfo->tqi_readyTime;
296 if (qi->tqi_type == ATH9K_TX_QUEUE_DATA)
297 qi->tqi_intFlags = ATH9K_TXQ_USE_LOCKOUT_BKOFF_DIS;
312 struct ath9k_tx_queue_info *qi;
320 qi = &ah->txq[q];
321 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
327 qinfo->tqi_qflags = qi->tqi_qflags;
328 qinfo->tqi_ver = qi->tqi_ver;
329 qinfo->tqi_subtype = qi->tqi_subtype;
330 qinfo->tqi_qflags = qi->tqi_qflags;
331 qinfo->tqi_priority = qi->tqi_priority;
332 qinfo->tqi_aifs = qi->tqi_aifs;
333 qinfo->tqi_cwmin = qi->tqi_cwmin;
334 qinfo->tqi_cwmax = qi->tqi_cwmax;
335 qinfo->tqi_shretry = qi->tqi_shretry;
336 qinfo->tqi_lgretry = qi->tqi_lgretry;
337 qinfo->tqi_cbrPeriod = qi->tqi_cbrPeriod;
338 qinfo->tqi_cbrOverflowLimit = qi->tqi_cbrOverflowLimit;
339 qinfo->tqi_burstTime = qi->tqi_burstTime;
340 qinfo->tqi_readyTime = qi->tqi_readyTime;
350 struct ath9k_tx_queue_info *qi;
386 qi = &ah->txq[q];
387 if (qi->tqi_type != ATH9K_TX_QUEUE_INACTIVE) {
392 memset(qi, 0, sizeof(struct ath9k_tx_queue_info));
393 qi->tqi_type = type;
395 qi->tqi_qflags =
399 qi->tqi_aifs = INIT_AIFS;
400 qi->tqi_cwmin = ATH9K_TXQ_USEDEFAULT;
401 qi->tqi_cwmax = INIT_CWMAX;
402 qi->tqi_shretry = INIT_SH_RETRY;
403 qi->tqi_lgretry = INIT_LG_RETRY;
404 qi->tqi_physCompBuf = 0;
406 qi->tqi_physCompBuf = qinfo->tqi_physCompBuf;
418 struct ath9k_tx_queue_info *qi;
425 qi = &ah->txq[q];
426 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
434 qi->tqi_type = ATH9K_TX_QUEUE_INACTIVE;
440 ath9k_hw_set_txq_interrupts(ah, qi);
451 struct ath9k_tx_queue_info *qi;
460 qi = &ah->txq[q];
461 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
469 if (qi->tqi_cwmin == ATH9K_TXQ_USEDEFAULT) {
477 cwMin = qi->tqi_cwmin;
483 SM(qi->tqi_cwmax, AR_D_LCL_IFS_CWMAX) |
484 SM(qi->tqi_aifs, AR_D_LCL_IFS_AIFS));
489 SM(qi->tqi_shretry, AR_D_RETRY_LIMIT_FR_SH));
497 if (qi->tqi_cbrPeriod) {
499 SM(qi->tqi_cbrPeriod, AR_Q_CBRCFG_INTERVAL) |
500 SM(qi->tqi_cbrOverflowLimit, AR_Q_CBRCFG_OVF_THRESH));
503 (qi->tqi_cbrOverflowLimit ?
506 if (qi->tqi_readyTime && (qi->tqi_type != ATH9K_TX_QUEUE_CAB)) {
508 SM(qi->tqi_readyTime, AR_Q_RDYTIMECFG_DURATION) |
515 SM(qi->tqi_burstTime, AR_D_CHNTIME_DUR) |
516 (qi->tqi_burstTime ? AR_D_CHNTIME_EN : 0));
518 if (qi->tqi_burstTime
519 && (qi->tqi_qflags & TXQ_FLAG_RDYTIME_EXP_POLICY_ENABLE)) {
526 if (qi->tqi_qflags & TXQ_FLAG_BACKOFF_DISABLE) {
535 if (qi->tqi_qflags & TXQ_FLAG_FRAG_BURST_BACKOFF_ENABLE) {
540 switch (qi->tqi_type) {
567 | SM(qi->tqi_aifs, AR_D_LCL_IFS_AIFS));
577 value = (qi->tqi_readyTime -
603 if (qi->tqi_intFlags & ATH9K_TXQ_USE_LOCKOUT_BKOFF_DIS) {
614 if (qi->tqi_qflags & TXQ_FLAG_TXOKINT_ENABLE)
618 if (qi->tqi_qflags & TXQ_FLAG_TXERRINT_ENABLE)
622 if (qi->tqi_qflags & TXQ_FLAG_TXDESCINT_ENABLE)
626 if (qi->tqi_qflags & TXQ_FLAG_TXEOLINT_ENABLE)
630 if (qi->tqi_qflags & TXQ_FLAG_TXURNINT_ENABLE)
634 ath9k_hw_set_txq_interrupts(ah, qi);
828 struct ath9k_tx_queue_info qi;
830 memset(&qi, 0, sizeof(qi));
831 qi.tqi_aifs = 1;
832 qi.tqi_cwmin = 0;
833 qi.tqi_cwmax = 0;
835 return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi);