Lines Matching defs:ah
36 static void ar9003_2p0_hw_init_mode_regs(struct ath_hw *ah)
39 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
40 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
43 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
48 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
49 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
52 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
57 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
58 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
61 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
66 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
69 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
70 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
75 INIT_INI_ARRAY(&ah->iniModesRxGain,
78 INIT_INI_ARRAY(&ah->iniModesTxGain,
87 INIT_INI_ARRAY(&ah->iniPcieSerdes,
94 INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
100 INIT_INI_ARRAY(&ah->iniModesAdditional,
107 static void ar9003_2p2_hw_init_mode_regs(struct ath_hw *ah)
110 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
111 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
114 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
119 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
120 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
123 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
128 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
129 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
132 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
137 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
140 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
141 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
146 INIT_INI_ARRAY(&ah->iniModesRxGain,
149 INIT_INI_ARRAY(&ah->iniModesTxGain,
158 INIT_INI_ARRAY(&ah->iniPcieSerdes,
165 INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
171 INIT_INI_ARRAY(&ah->iniModesAdditional,
181 static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
183 if (AR_SREV_9300_20(ah))
184 ar9003_2p0_hw_init_mode_regs(ah);
186 ar9003_2p2_hw_init_mode_regs(ah);
189 static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
191 switch (ar9003_hw_get_tx_gain_idx(ah)) {
194 if (AR_SREV_9300_20(ah))
195 INIT_INI_ARRAY(&ah->iniModesTxGain,
200 INIT_INI_ARRAY(&ah->iniModesTxGain,
206 if (AR_SREV_9300_20(ah))
207 INIT_INI_ARRAY(&ah->iniModesTxGain,
212 INIT_INI_ARRAY(&ah->iniModesTxGain,
218 if (AR_SREV_9300_20(ah))
219 INIT_INI_ARRAY(&ah->iniModesTxGain,
224 INIT_INI_ARRAY(&ah->iniModesTxGain,
232 static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
234 switch (ar9003_hw_get_rx_gain_idx(ah)) {
237 if (AR_SREV_9300_20(ah))
238 INIT_INI_ARRAY(&ah->iniModesRxGain,
243 INIT_INI_ARRAY(&ah->iniModesRxGain,
249 if (AR_SREV_9300_20(ah))
250 INIT_INI_ARRAY(&ah->iniModesRxGain,
255 INIT_INI_ARRAY(&ah->iniModesRxGain,
264 static void ar9003_hw_init_mode_gain_regs(struct ath_hw *ah)
266 ar9003_tx_gain_table_apply(ah);
267 ar9003_rx_gain_table_apply(ah);
279 static void ar9003_hw_configpcipowersave(struct ath_hw *ah,
283 if (ah->is_pciexpress != true)
287 if (ah->config.pcie_powersave_enable == 2)
293 REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA);
296 if (ah->config.pcie_waen)
297 REG_WRITE(ah, AR_WA, ah->config.pcie_waen);
299 REG_WRITE(ah, AR_WA, ah->WARegVal);
306 if (ah->config.pcieSerDesWrite) {
310 array = power_off ? &ah->iniPcieSerdes :
311 &ah->iniPcieSerdesLowPower;
314 REG_WRITE(ah,
322 void ar9003_hw_attach_ops(struct ath_hw *ah)
324 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
325 struct ath_hw_ops *ops = ath9k_hw_ops(ah);
333 ar9003_hw_attach_phy_ops(ah);
334 ar9003_hw_attach_calib_ops(ah);
335 ar9003_hw_attach_mac_ops(ah);
337 ath9k_hw_attach_ani_ops_new(ah);