Lines Matching refs:pPwrArray
1338 static int ar9003_hw_tx_power_regwrite(struct ath_hw *ah, u8 * pPwrArray)
1348 POW_SM(pPwrArray[ALL_TARGET_LEGACY_6_24], 24) |
1349 POW_SM(pPwrArray[ALL_TARGET_LEGACY_6_24], 16) |
1350 POW_SM(pPwrArray[ALL_TARGET_LEGACY_6_24], 8) |
1351 POW_SM(pPwrArray[ALL_TARGET_LEGACY_6_24], 0));
1355 POW_SM(pPwrArray[ALL_TARGET_LEGACY_54], 24) |
1356 POW_SM(pPwrArray[ALL_TARGET_LEGACY_48], 16) |
1357 POW_SM(pPwrArray[ALL_TARGET_LEGACY_36], 8) |
1358 POW_SM(pPwrArray[ALL_TARGET_LEGACY_6_24], 0));
1364 POW_SM(pPwrArray[ALL_TARGET_LEGACY_1L_5L], 24) |
1365 POW_SM(pPwrArray[ALL_TARGET_LEGACY_1L_5L], 16) |
1367 POW_SM(pPwrArray[ALL_TARGET_LEGACY_1L_5L], 0));
1371 POW_SM(pPwrArray[ALL_TARGET_LEGACY_11S], 24) |
1372 POW_SM(pPwrArray[ALL_TARGET_LEGACY_11L], 16) |
1373 POW_SM(pPwrArray[ALL_TARGET_LEGACY_5S], 8) |
1374 POW_SM(pPwrArray[ALL_TARGET_LEGACY_1L_5L], 0)
1381 POW_SM(pPwrArray[ALL_TARGET_HT20_5], 24) |
1382 POW_SM(pPwrArray[ALL_TARGET_HT20_4], 16) |
1383 POW_SM(pPwrArray[ALL_TARGET_HT20_1_3_9_11_17_19], 8) |
1384 POW_SM(pPwrArray[ALL_TARGET_HT20_0_8_16], 0)
1389 POW_SM(pPwrArray[ALL_TARGET_HT20_13], 24) |
1390 POW_SM(pPwrArray[ALL_TARGET_HT20_12], 16) |
1391 POW_SM(pPwrArray[ALL_TARGET_HT20_7], 8) |
1392 POW_SM(pPwrArray[ALL_TARGET_HT20_6], 0)
1397 POW_SM(pPwrArray[ALL_TARGET_HT20_21], 24) |
1398 POW_SM(pPwrArray[ALL_TARGET_HT20_20], 16) |
1399 POW_SM(pPwrArray[ALL_TARGET_HT20_15], 8) |
1400 POW_SM(pPwrArray[ALL_TARGET_HT20_14], 0)
1407 POW_SM(pPwrArray[ALL_TARGET_HT40_23], 24) |
1408 POW_SM(pPwrArray[ALL_TARGET_HT40_22], 16) |
1409 POW_SM(pPwrArray[ALL_TARGET_HT20_23], 8) |
1410 POW_SM(pPwrArray[ALL_TARGET_HT20_22], 0)
1419 POW_SM(pPwrArray[ALL_TARGET_HT40_5], 24) |
1420 POW_SM(pPwrArray[ALL_TARGET_HT40_4], 16) |
1421 POW_SM(pPwrArray[ALL_TARGET_HT40_1_3_9_11_17_19], 8) |
1422 POW_SM(pPwrArray[ALL_TARGET_HT40_0_8_16], 0)
1427 POW_SM(pPwrArray[ALL_TARGET_HT40_13], 24) |
1428 POW_SM(pPwrArray[ALL_TARGET_HT40_12], 16) |
1429 POW_SM(pPwrArray[ALL_TARGET_HT40_7], 8) |
1430 POW_SM(pPwrArray[ALL_TARGET_HT40_6], 0)
1435 POW_SM(pPwrArray[ALL_TARGET_HT40_21], 24) |
1436 POW_SM(pPwrArray[ALL_TARGET_HT40_20], 16) |
1437 POW_SM(pPwrArray[ALL_TARGET_HT40_15], 8) |
1438 POW_SM(pPwrArray[ALL_TARGET_HT40_14], 0)
1909 u8 *pPwrArray, u16 cfgCtl,
2092 pPwrArray[i] =
2093 (u8)min((u16)pPwrArray[i],
2100 pPwrArray[i] =
2101 (u8)min((u16)pPwrArray[i],
2108 pPwrArray[i] =
2109 (u8)min((u16)pPwrArray[i],
2111 pPwrArray[ALL_TARGET_HT20_22] =
2112 (u8)min((u16)pPwrArray[ALL_TARGET_HT20_22],
2114 pPwrArray[ALL_TARGET_HT20_23] =
2115 (u8)min((u16)pPwrArray[ALL_TARGET_HT20_23],
2122 pPwrArray[i] =
2123 (u8)min((u16)pPwrArray[i],