Lines Matching refs:ADM8211_CSR_READ
81 u32 reg = ADM8211_CSR_READ(SPR);
104 ADM8211_CSR_READ(SPR); /* eeprom_delay */
119 if (ADM8211_CSR_READ(CSR_TEST0) & ADM8211_CSR_TEST0_EPTYP) {
252 ADM8211_CSR_READ(WEPCTL);
256 ADM8211_CSR_READ(WESK);
265 u32 reg = ADM8211_CSR_READ(WEPCTL);
287 u32 reg = ADM8211_CSR_READ(WEPCTL);
465 u32 stsr = ADM8211_CSR_READ(STSR);
513 ADM8211_CSR_READ(SYNRF); \
515 ADM8211_CSR_READ(SYNRF); \
519 ADM8211_CSR_READ(SYNRF); \
529 ADM8211_CSR_READ(SYNRF); \
532 ADM8211_CSR_READ(SYNRF); \
534 ADM8211_CSR_READ(SYNRF); \
539 ADM8211_CSR_READ(SYNRF); \
543 ADM8211_CSR_READ(SYNRF); \
547 ADM8211_CSR_READ(SYNRF); \
565 reg = ADM8211_CSR_READ(BBPCTL);
598 reg = ADM8211_CSR_READ(BBPCTL);
606 ADM8211_CSR_WRITE(BBPCTL, ADM8211_CSR_READ(BBPCTL) &
689 reg = ADM8211_CSR_READ(GPIO);
710 reg = ADM8211_CSR_READ(PLCPHD);
718 ADM8211_CSR_READ(SYNRF);
741 reg = ADM8211_CSR_READ(CAP0);
860 reg = ADM8211_CSR_READ(BBPCTL);
879 reg = ADM8211_CSR_READ(MMIRD1);
901 ADM8211_CSR_READ(SYNRF);
1040 reg = ADM8211_CSR_READ(SYNCTL);
1071 reg = ADM8211_CSR_READ(PLCPHD) & 0x00FFFFFF; /* keep bits 0-23 */
1090 reg = ADM8211_CSR_READ(PAR);
1112 reg = ADM8211_CSR_READ(CSR_TEST1);
1123 reg = ADM8211_CSR_READ(CMDR);
1150 ADM8211_CSR_READ(SYNRF);
1153 ADM8211_CSR_READ(SYNRF);
1157 reg = ADM8211_CSR_READ(CFPP);
1189 ADM8211_CSR_WRITE(STSR, ADM8211_CSR_READ(STSR));
1192 reg = ADM8211_CSR_READ(MACTEST);
1196 reg = ADM8211_CSR_READ(WEPCTL);
1202 ADM8211_CSR_READ(LPC);
1216 tmp = ADM8211_CSR_READ(PAR);
1219 while ((ADM8211_CSR_READ(PAR) & ADM8211_PAR_SWR) && timeout--)
1230 reg = ADM8211_CSR_READ(CSR_TEST1);
1234 reg = ADM8211_CSR_READ(CSR_TEST1);
1241 reg = ADM8211_CSR_READ(CSR_TEST0);
1256 tsftl = ADM8211_CSR_READ(TSFTL);
1257 tsft = ADM8211_CSR_READ(TSFTH);
1282 reg = ADM8211_CSR_READ(ABDA1);
1370 ADM8211_CSR_READ(NAR);
1553 ADM8211_CSR_READ(NAR);
1849 *(__le32 *)perm_addr = cpu_to_le32(ADM8211_CSR_READ(PAR0));
1851 cpu_to_le16(ADM8211_CSR_READ(PAR1) & 0xFFFF);
1880 ADM8211_CSR_READ(FRCTL);
1882 ADM8211_CSR_READ(FRCTL);