Lines Matching refs:x80
38 #define CMDR_RMC 0x80
49 #define MODE_MDS2 0x80
57 #define IPC_VIS 0x80
64 #define CCR1_SFLG 0x80
77 #define CCR3_PRE1 0x80
88 #define RTR1_TS0 0x80
97 #define RTR2_TS8 0x80
106 #define RTR3_TS16 0x80
115 #define RTR4_TS24 0x80
128 #define TTR1_TS0 0x80
137 #define TTR2_TS8 0x80
146 #define TTR3_TS16 0x80
155 #define TTR4_TS24 0x80
170 #define IMR0_RME 0x80
182 #define IMR1_CASE 0x80
189 #define IMR1_LLBSC 0x80
191 #define IMR2_FAR 0x80
201 #define IMR3_ES 0x80
214 #define IMR4_LFA 0x80
225 #define FMR0_XC1 0x80
237 #define FMR1_MFCS 0x80
240 #define FMR1_CTM 0x80
250 #define FMR2_RFS1 0x80
272 #define FMR4_AIS3 0x80
281 #define FMR5_SRS 0x80
305 #define XSW_XSIS 0x80
319 #define XSP_XAP 0x80
332 #define XC0_SA8E 0x80
337 #define XC0_BRM 0x80
363 #define RC1_SWD 0x80
378 #define XPM0_XP12 0x80
387 #define XPM1_XP30 0x80
396 #define XPM2_XLHP 0x80
408 #define TSWM_TSIS 0x80
421 #define IDLE_IDL7 0x80
434 #define XSA4_XS47 0x80
443 #define XSA5_XS57 0x80
452 #define XSA6_XS67 0x80
461 #define XSA7_XS77 0x80
470 #define XSA8_XS87 0x80
483 #define XDL1_XDL17 0x80
492 #define XDL2_XDL27 0x80
501 #define XDL3_XDL37 0x80
514 #define E1_ICB1_IC0 0x80
523 #define E1_ICB2_IC8 0x80
532 #define E1_ICB3_IC16 0x80
541 #define E1_ICB4_IC24 0x80
553 #define T1_ICB1_IC1 0x80
562 #define T1_ICB2_IC9 0x80
571 #define T1_ICB3_IC17 0x80
593 #define CCB1_CH1 0x80
602 #define CCB2_CH9 0x80
611 #define CCB3_CH17 0x80
624 #define LIM0_XFB 0x80
633 #define LIM1_EFSC 0x80
646 #define PCDR_PCD7 0x80
655 #define PCRR_PCR7 0x80
676 #define LCR1_EPRM 0x80
680 #define SIC1_SRSC 0x80
706 #define FRS0_LOS 0x80
719 #define FRS1_EXZD 0x80
729 #define FRS2_ESC2 0x80
744 #define RSW_RSI 0x80
756 #define RSP_SI1 0x80
768 #define FECL_FE7 0x80
777 #define FECH_FE15 0x80
790 #define CVCL_CV7 0x80
799 #define CVCH_CV15 0x80
812 #define CEC1L_CR7 0x80
821 #define CEC1H_CR15 0x80
830 #define CEC2L_CR7 0x80
839 #define CEC2H_CR15 0x80
848 #define CEC3L_CR7 0x80
857 #define CEC3H_CR15 0x80
871 #define CECL_CR7 0x80
880 #define CECH_CR15 0x80
892 #define EBCL_EB7 0x80
901 #define EBCH_EB15 0x80
914 #define RSA4_RS47 0x80
923 #define RSA5_RS57 0x80
932 #define RSA6_RS67 0x80
941 #define RSA7_RS77 0x80
950 #define RSA8_RS87 0x80
973 #define RDL1_RDL17 0x80
982 #define RDL2_RDL27 0x80
991 #define RDL3_RDL37 0x80
1005 #define SIS_XDOV 0x80
1017 #define RSIS_VFR 0x80
1031 #define RBCL_RBC7 0x80
1051 #define FISR0_RME 0x80
1063 #define FISR1_CASE 0x80
1064 #define FISR1_LLBSC 0x80
1072 #define FISR2_FAR 0x80
1082 #define FISR3_ES 0x80