Lines Matching refs:suConfig
352 struct su_config suConfig; /* TE1 Bits */
1705 FST_WRL(card, suConfig.dataRate, info->lineSpeed);
1706 FST_WRB(card, suConfig.clocking, info->clockSource);
1714 FST_WRB(card, suConfig.framing, my_framing);
1715 FST_WRB(card, suConfig.structure, info->structure);
1716 FST_WRB(card, suConfig.interface, info->interface);
1717 FST_WRB(card, suConfig.coding, info->coding);
1718 FST_WRB(card, suConfig.lineBuildOut, info->lineBuildOut);
1719 FST_WRB(card, suConfig.equalizer, info->equalizer);
1720 FST_WRB(card, suConfig.transparentMode, info->transparentMode);
1721 FST_WRB(card, suConfig.loopMode, info->loopMode);
1722 FST_WRB(card, suConfig.range, info->range);
1723 FST_WRB(card, suConfig.txBufferMode, info->txBufferMode);
1724 FST_WRB(card, suConfig.rxBufferMode, info->rxBufferMode);
1725 FST_WRB(card, suConfig.startingSlot, info->startingSlot);
1726 FST_WRB(card, suConfig.losThreshold, info->losThreshold);
1728 FST_WRB(card, suConfig.enableIdleCode, 1);
1730 FST_WRB(card, suConfig.enableIdleCode, 0);
1731 FST_WRB(card, suConfig.idleCode, info->idleCode);
1826 info->lineSpeed = FST_RDL(card, suConfig.dataRate);
1827 info->clockSource = FST_RDB(card, suConfig.clocking);
1828 info->framing = FST_RDB(card, suConfig.framing);
1829 info->structure = FST_RDB(card, suConfig.structure);
1830 info->interface = FST_RDB(card, suConfig.interface);
1831 info->coding = FST_RDB(card, suConfig.coding);
1832 info->lineBuildOut = FST_RDB(card, suConfig.lineBuildOut);
1833 info->equalizer = FST_RDB(card, suConfig.equalizer);
1834 info->loopMode = FST_RDB(card, suConfig.loopMode);
1835 info->range = FST_RDB(card, suConfig.range);
1836 info->txBufferMode = FST_RDB(card, suConfig.txBufferMode);
1837 info->rxBufferMode = FST_RDB(card, suConfig.rxBufferMode);
1838 info->startingSlot = FST_RDB(card, suConfig.startingSlot);
1839 info->losThreshold = FST_RDB(card, suConfig.losThreshold);
1840 if (FST_RDB(card, suConfig.enableIdleCode))
1841 info->idleCode = FST_RDB(card, suConfig.idleCode);