Lines Matching refs:portConfig
306 struct port_cfg portConfig[FST_MAX_PORTS];
1700 FST_WRB(card, portConfig[port->index].invertClock,
1792 info->lineInterface = FST_RDW(card, portConfig[i].lineInterface);
1793 info->internalClock = FST_RDB(card, portConfig[i].internalClock);
1794 info->lineSpeed = FST_RDL(card, portConfig[i].lineSpeed);
1795 info->invertClock = FST_RDB(card, portConfig[i].invertClock);
1883 FST_WRW(card, portConfig[i].lineInterface, V35);
1888 FST_WRW(card, portConfig[i].lineInterface, V24);
1893 FST_WRW(card, portConfig[i].lineInterface, X21);
1898 FST_WRW(card, portConfig[i].lineInterface, X21D);
1903 FST_WRW(card, portConfig[i].lineInterface, T1);
1908 FST_WRW(card, portConfig[i].lineInterface, E1);
1921 FST_WRB(card, portConfig[i].internalClock, EXTCLK);
1925 FST_WRB(card, portConfig[i].internalClock, INTCLK);
1931 FST_WRL(card, portConfig[i].lineSpeed, sync.clock_rate);
1975 sync.clock_rate = FST_RDL(card, portConfig[i].lineSpeed);
1977 sync.clock_type = FST_RDB(card, portConfig[i].internalClock) ==