Lines Matching refs:mac_regs
94 static void mac_get_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
122 static void mac_set_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
140 static void mac_set_vlan_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
166 static void mac_set_cam(struct mac_regs __iomem *regs, int idx, const u8 *addr)
190 static void mac_set_vlan_cam(struct mac_regs __iomem *regs, int idx,
221 static void mac_wol_reset(struct mac_regs __iomem *regs)
401 iounmap(vptr->mac_regs);
502 struct mac_regs __iomem *regs = vptr->mac_regs;
575 struct mac_regs __iomem *regs = vptr->mac_regs;
631 static void safe_disable_mii_autopoll(struct mac_regs __iomem *regs)
651 static void enable_mii_autopoll(struct mac_regs __iomem *regs)
683 static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
717 static u32 mii_check_media_mode(struct mac_regs __iomem *regs)
762 static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
804 MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
805 MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
809 MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
810 MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
814 MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
815 MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
819 MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
820 MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
835 if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs))
836 MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs);
838 MII_REG_BITS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs);
841 static u32 check_connection_type(struct mac_regs __iomem *regs)
888 struct mac_regs __iomem *regs = vptr->mac_regs;
890 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
900 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
901 vptr->mii_status=check_connection_type(vptr->mac_regs);
908 MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs);
918 MII_REG_BITS_ON(ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF, MII_ADVERTISE, vptr->mac_regs);
919 MII_REG_BITS_ON(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs);
920 MII_REG_BITS_ON(BMCR_SPEED1000, MII_BMCR, vptr->mac_regs);
955 MII_REG_BITS_OFF(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs);
962 /* MII_REG_BITS_OFF(BMCR_SPEED1000, MII_BMCR, vptr->mac_regs); */
963 velocity_mii_read(vptr->mac_regs, MII_ADVERTISE, &ANAR);
976 velocity_mii_write(vptr->mac_regs, MII_ADVERTISE, ANAR);
979 /* MII_REG_BITS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs); */
981 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
982 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
1044 struct mac_regs __iomem *regs = vptr->mac_regs;
1095 struct mac_regs __iomem *regs = vptr->mac_regs;
1125 struct mac_regs __iomem *regs = vptr->mac_regs;
1180 MII_REG_BITS_OFF((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
1187 MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
1189 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
1193 MII_REG_BITS_ON(PLED_LALBE, MII_TPISTATUS, vptr->mac_regs);
1200 MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
1207 MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
1209 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
1217 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
1221 MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
1226 velocity_mii_read(vptr->mac_regs, MII_BMCR, &BMCR);
1229 velocity_mii_write(vptr->mac_regs, MII_BMCR, BMCR);
1252 writeb(txqueue_timer, &vptr->mac_regs->TQETMR);
1253 writeb(rxqueue_timer, &vptr->mac_regs->RQETMR);
1266 struct mac_regs __iomem *regs = vptr->mac_regs;
1305 struct mac_regs __iomem *regs = vptr->mac_regs;
1419 struct mac_regs __iomem *regs = vptr->mac_regs;
1801 struct mac_regs __iomem *regs = vptr->mac_regs;
1811 struct mac_regs __iomem *regs = vptr->mac_regs;
1870 mac_rx_queue_wake(vptr->mac_regs);
2162 mac_enable_int(vptr->mac_regs);
2186 isr_status = mac_read_isr(vptr->mac_regs);
2195 mac_write_isr(vptr->mac_regs, isr_status);
2198 mac_disable_int(vptr->mac_regs);
2245 mac_enable_int(vptr->mac_regs);
2262 struct mac_regs __iomem *regs = vptr->mac_regs;
2338 mac_enable_int(vptr->mac_regs);
2365 struct mac_regs __iomem *regs = vptr->mac_regs;
2375 if (velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
2380 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
2382 check_connection_type(vptr->mac_regs);
2601 mac_tx_queue_wake(vptr->mac_regs, qnum);
2703 struct mac_regs __iomem *regs = vptr->mac_regs;
2724 struct mac_regs __iomem *regs;
2781 vptr->mac_regs = regs;
2810 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
2889 struct mac_regs __iomem *regs = vptr->mac_regs;
2937 MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs);
2939 MII_REG_BITS_OFF(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs);
2943 MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs);
2975 struct mac_regs __iomem *regs = vptr->mac_regs;
3034 struct mac_regs __iomem *regs = vptr->mac_regs;
3073 mac_wol_reset(vptr->mac_regs);
3078 mac_disable_int(vptr->mac_regs);
3084 mac_tx_queue_wake(vptr->mac_regs, i);
3087 mac_enable_int(vptr->mac_regs);
3143 struct mac_regs __iomem *regs = vptr->mac_regs;
3145 status = check_connection_type(vptr->mac_regs);
3181 curr_status = check_connection_type(vptr->mac_regs);
3347 mac_disable_int(vptr->mac_regs);
3351 mac_write_int_mask(vptr->int_mask, vptr->mac_regs);
3352 mac_clear_isr(vptr->mac_regs);
3353 mac_enable_int(vptr->mac_regs);