Lines Matching defs:uf_info
77 .uf_info = {
215 skb = dev_alloc_skb(ugeth->ug_info->uf_info.max_rx_buf_length +
233 ugeth->ug_info->uf_info.max_rx_buf_length +
430 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num);
597 ugeth_info("UCC%d Geth registers:", ugeth->ug_info->uf_info.ucc_num + 1);
1437 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num);
1471 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.
1492 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num);
1507 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num);
1523 if (ugeth->ug_info->uf_info.ucc_num >= UCC_MAX_NUM) {
1552 if (ugeth->ug_info->uf_info.ucc_num >= UCC_MAX_NUM) {
1580 disable_irq(ugeth->ug_info->uf_info.irq);
1589 enable_irq(ugeth->ug_info->uf_info.irq);
1946 if (ugeth->ug_info->uf_info.bd_mem_part ==
1949 else if (ugeth->ug_info->uf_info.bd_mem_part ==
1964 uf_info.max_rx_buf_length +
1976 if (ugeth->ug_info->uf_info.bd_mem_part ==
1979 else if (ugeth->ug_info->uf_info.bd_mem_part ==
2077 struct ucc_fast_info *uf_info;
2081 uf_info = &ug_info->uf_info;
2083 if (!((uf_info->bd_mem_part == MEM_PART_SYSTEM) ||
2084 (uf_info->bd_mem_part == MEM_PART_MURAM))) {
2116 if ((uf_info->max_rx_buf_length == 0) ||
2117 (uf_info->max_rx_buf_length % UCC_GETH_MRBLR_ALIGNMENT)) {
2181 uf_info->uccm_mask = ug_info->eventRegMask & UCCE_OTHER;/* Errors */
2183 uf_info->uccm_mask |= (UCC_GETH_UCCE_RXF0 << i);
2186 uf_info->uccm_mask |= (UCC_GETH_UCCE_TXB0 << i);
2188 if (ucc_fast_init(uf_info, &ugeth->uccf)) {
2202 ugeth->ug_regs = ioremap(uf_info->regs, sizeof(*ugeth->ug_regs));
2220 struct ucc_fast_info *uf_info;
2237 uf_info = &ug_info->uf_info;
2381 if (uf_info->bd_mem_part == MEM_PART_SYSTEM) {
2392 } else if (uf_info->bd_mem_part == MEM_PART_MURAM) {
2417 if (uf_info->bd_mem_part == MEM_PART_SYSTEM) {
2427 } else if (uf_info->bd_mem_part == MEM_PART_MURAM) {
2585 if (ugeth->ug_info->uf_info.bd_mem_part == MEM_PART_SYSTEM) {
2591 } else if (ugeth->ug_info->uf_info.bd_mem_part ==
2789 init_max_rx_buff_len(uf_info->max_rx_buf_length,
2853 if (ugeth->ug_info->uf_info.bd_mem_part == MEM_PART_SYSTEM) {
2856 } else if (ugeth->ug_info->uf_info.bd_mem_part ==
3099 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num);
3293 ugeth->ug_info->uf_info.max_rx_buf_length +
3394 int irq = ugeth->ug_info->uf_info.irq;
3520 err = request_irq(ugeth->ug_info->uf_info.irq, ucc_geth_irq_handler,
3555 free_irq(ugeth->ug_info->uf_info.irq, ugeth->ndev);
3783 ug_info->uf_info.ucc_num = ucc_num;
3787 ug_info->uf_info.rx_clock = qe_clock_source(sprop);
3788 if ((ug_info->uf_info.rx_clock < QE_CLK_NONE) ||
3789 (ug_info->uf_info.rx_clock > QE_CLK24)) {
3808 ug_info->uf_info.rx_clock = *prop;
3813 ug_info->uf_info.tx_clock = qe_clock_source(sprop);
3814 if ((ug_info->uf_info.tx_clock < QE_CLK_NONE) ||
3815 (ug_info->uf_info.tx_clock > QE_CLK24)) {
3832 ug_info->uf_info.tx_clock = *prop;
3839 ug_info->uf_info.regs = res.start;
3840 ug_info->uf_info.irq = irq_of_parse_and_map(np, 0);
3881 ug_info->uf_info.urfs = UCC_GETH_URFS_GIGA_INIT;
3882 ug_info->uf_info.urfet = UCC_GETH_URFET_GIGA_INIT;
3883 ug_info->uf_info.urfset = UCC_GETH_URFSET_GIGA_INIT;
3884 ug_info->uf_info.utfs = UCC_GETH_UTFS_GIGA_INIT;
3885 ug_info->uf_info.utfet = UCC_GETH_UTFET_GIGA_INIT;
3886 ug_info->uf_info.utftt = UCC_GETH_UTFTT_GIGA_INIT;
3901 ug_info->uf_info.ucc_num + 1, ug_info->uf_info.regs,
3902 ug_info->uf_info.irq);
3920 dev->base_addr = (unsigned long)(ug_info->uf_info.regs);