Lines Matching refs:tnapi
160 #define TG3_TX_WAKEUP_THRESH(tnapi) ((tnapi)->tx_pending / 4)
682 struct tg3_napi *tnapi = &tp->napi[i];
684 tw32_mailbox_f(tnapi->int_mbox, tnapi->last_tag << 24);
686 tw32_mailbox_f(tnapi->int_mbox, tnapi->last_tag << 24);
688 tp->coal_now |= tnapi->coal_now;
701 static inline unsigned int tg3_has_work(struct tg3_napi *tnapi)
703 struct tg3 *tp = tnapi->tp;
704 struct tg3_hw_status *sblk = tnapi->hw_status;
715 if (sblk->idx[0].tx_consumer != tnapi->tx_cons ||
716 *(tnapi->rx_rcb_prod_idx) != tnapi->rx_rcb_ptr)
727 static void tg3_int_reenable(struct tg3_napi *tnapi)
729 struct tg3 *tp = tnapi->tp;
731 tw32_mailbox(tnapi->int_mbox, tnapi->last_tag << 24);
739 tg3_has_work(tnapi))
741 HOSTCC_MODE_ENABLE | tnapi->coal_now);
4361 static inline u32 tg3_tx_avail(struct tg3_napi *tnapi)
4365 return tnapi->tx_pending -
4366 ((tnapi->tx_prod - tnapi->tx_cons) & (TG3_TX_RING_SIZE - 1));
4373 static void tg3_tx(struct tg3_napi *tnapi)
4375 struct tg3 *tp = tnapi->tp;
4376 u32 hw_idx = tnapi->hw_status->idx[0].tx_consumer;
4377 u32 sw_idx = tnapi->tx_cons;
4379 int index = tnapi - tp->napi;
4387 struct ring_info *ri = &tnapi->tx_buffers[sw_idx];
4406 ri = &tnapi->tx_buffers[sw_idx];
4425 tnapi->tx_cons = sw_idx;
4435 (tg3_tx_avail(tnapi) > TG3_TX_WAKEUP_THRESH(tnapi)))) {
4438 (tg3_tx_avail(tnapi) > TG3_TX_WAKEUP_THRESH(tnapi)))
4527 static void tg3_recycle_rx(struct tg3_napi *tnapi,
4532 struct tg3 *tp = tnapi->tp;
4597 static int tg3_rx(struct tg3_napi *tnapi, int budget)
4599 struct tg3 *tp = tnapi->tp;
4602 u32 sw_idx = tnapi->rx_rcb_ptr;
4605 struct tg3_rx_prodring_set *tpr = tnapi->prodring;
4607 hw_idx = *(tnapi->rx_rcb_prod_idx);
4619 struct tg3_rx_buffer_desc *desc = &tnapi->rx_rcb[sw_idx];
4648 tg3_recycle_rx(tnapi, tpr, opaque_key,
4681 tg3_recycle_rx(tnapi, tpr, opaque_key,
4736 vlan_gro_receive(&tnapi->napi, tp->vlgrp, vtag, skb);
4739 napi_gro_receive(&tnapi->napi, skb);
4760 hw_idx = *(tnapi->rx_rcb_prod_idx);
4766 tnapi->rx_rcb_ptr = sw_idx;
4767 tw32_rx_mbox(tnapi->consmbox, sw_idx);
4792 if (tnapi != &tp->napi[1])
4948 static int tg3_poll_work(struct tg3_napi *tnapi, int work_done, int budget)
4950 struct tg3 *tp = tnapi->tp;
4953 if (tnapi->hw_status->idx[0].tx_consumer != tnapi->tx_cons) {
4954 tg3_tx(tnapi);
4963 if (*(tnapi->rx_rcb_prod_idx) != tnapi->rx_rcb_ptr)
4964 work_done += tg3_rx(tnapi, budget - work_done);
4966 if ((tp->tg3_flags3 & TG3_FLG3_ENABLE_RSS) && tnapi == &tp->napi[1]) {
4997 struct tg3_napi *tnapi = container_of(napi, struct tg3_napi, napi);
4998 struct tg3 *tp = tnapi->tp;
5000 struct tg3_hw_status *sblk = tnapi->hw_status;
5003 work_done = tg3_poll_work(tnapi, work_done, budget);
5015 tnapi->last_tag = sblk->status_tag;
5016 tnapi->last_irq_tag = tnapi->last_tag;
5020 if (likely(sblk->idx[0].tx_consumer == tnapi->tx_cons &&
5021 *(tnapi->rx_rcb_prod_idx) == tnapi->rx_rcb_ptr)) {
5024 tw32_mailbox(tnapi->int_mbox, tnapi->last_tag << 24);
5041 struct tg3_napi *tnapi = container_of(napi, struct tg3_napi, napi);
5042 struct tg3 *tp = tnapi->tp;
5044 struct tg3_hw_status *sblk = tnapi->hw_status;
5049 work_done = tg3_poll_work(tnapi, work_done, budget);
5062 tnapi->last_tag = sblk->status_tag;
5063 tnapi->last_irq_tag = tnapi->last_tag;
5068 if (likely(!tg3_has_work(tnapi))) {
5070 tg3_int_reenable(tnapi);
5124 struct tg3_napi *tnapi = dev_id;
5125 struct tg3 *tp = tnapi->tp;
5127 prefetch(tnapi->hw_status);
5128 if (tnapi->rx_rcb)
5129 prefetch(&tnapi->rx_rcb[tnapi->rx_rcb_ptr]);
5132 napi_schedule(&tnapi->napi);
5143 struct tg3_napi *tnapi = dev_id;
5144 struct tg3 *tp = tnapi->tp;
5146 prefetch(tnapi->hw_status);
5147 if (tnapi->rx_rcb)
5148 prefetch(&tnapi->rx_rcb[tnapi->rx_rcb_ptr]);
5158 napi_schedule(&tnapi->napi);
5165 struct tg3_napi *tnapi = dev_id;
5166 struct tg3 *tp = tnapi->tp;
5167 struct tg3_hw_status *sblk = tnapi->hw_status;
5198 if (likely(tg3_has_work(tnapi))) {
5199 prefetch(&tnapi->rx_rcb[tnapi->rx_rcb_ptr]);
5200 napi_schedule(&tnapi->napi);
5214 struct tg3_napi *tnapi = dev_id;
5215 struct tg3 *tp = tnapi->tp;
5216 struct tg3_hw_status *sblk = tnapi->hw_status;
5224 if (unlikely(sblk->status_tag == tnapi->last_irq_tag)) {
5251 tnapi->last_irq_tag = sblk->status_tag;
5256 prefetch(&tnapi->rx_rcb[tnapi->rx_rcb_ptr]);
5258 napi_schedule(&tnapi->napi);
5267 struct tg3_napi *tnapi = dev_id;
5268 struct tg3 *tp = tnapi->tp;
5269 struct tg3_hw_status *sblk = tnapi->hw_status;
5409 static int tigon3_dma_hwbug_workaround(struct tg3_napi *tnapi,
5413 struct tg3 *tp = tnapi->tp;
5453 tg3_set_txd(tnapi, entry, new_addr, new_skb->len,
5470 dma_unmap_addr(&tnapi->tx_buffers[entry],
5474 tnapi->tx_buffers[entry].skb = new_skb;
5475 dma_unmap_addr_set(&tnapi->tx_buffers[entry], mapping,
5478 tnapi->tx_buffers[entry].skb = NULL;
5489 static void tg3_set_txd(struct tg3_napi *tnapi, int entry,
5493 struct tg3_tx_buffer_desc *txd = &tnapi->tx_ring[entry];
5521 struct tg3_napi *tnapi;
5526 tnapi = &tp->napi[skb_get_queue_mapping(skb)];
5528 tnapi++;
5535 if (unlikely(tg3_tx_avail(tnapi) <= (skb_shinfo(skb)->nr_frags + 1))) {
5546 entry = tnapi->tx_prod;
5604 tnapi->tx_buffers[entry].skb = skb;
5605 dma_unmap_addr_set(&tnapi->tx_buffers[entry], mapping, mapping);
5611 tg3_set_txd(tnapi, entry, mapping, len, base_flags,
5630 tnapi->tx_buffers[entry].skb = NULL;
5631 dma_unmap_addr_set(&tnapi->tx_buffers[entry], mapping,
5634 tg3_set_txd(tnapi, entry, mapping, len,
5642 tw32_tx_mbox(tnapi->prodmbox, entry);
5644 tnapi->tx_prod = entry;
5645 if (unlikely(tg3_tx_avail(tnapi) <= (MAX_SKB_FRAGS + 1))) {
5654 if (tg3_tx_avail(tnapi) > TG3_TX_WAKEUP_THRESH(tnapi))
5665 entry = tnapi->tx_prod;
5666 tnapi->tx_buffers[entry].skb = NULL;
5668 dma_unmap_addr(&tnapi->tx_buffers[entry], mapping),
5676 dma_unmap_addr(&tnapi->tx_buffers[entry],
5736 struct tg3_napi *tnapi;
5741 tnapi = &tp->napi[skb_get_queue_mapping(skb)];
5743 tnapi++;
5750 if (unlikely(tg3_tx_avail(tnapi) <= (skb_shinfo(skb)->nr_frags + 1))) {
5761 entry = tnapi->tx_prod;
5850 tnapi->tx_buffers[entry].skb = skb;
5851 dma_unmap_addr_set(&tnapi->tx_buffers[entry], mapping, mapping);
5869 tg3_set_txd(tnapi, entry, mapping, len, base_flags,
5886 tnapi->tx_buffers[entry].skb = NULL;
5887 dma_unmap_addr_set(&tnapi->tx_buffers[entry], mapping,
5905 tg3_set_txd(tnapi, entry, mapping, len,
5908 tg3_set_txd(tnapi, entry, mapping, len,
5922 if (tigon3_dma_hwbug_workaround(tnapi, skb, last_plus_one,
5930 tw32_tx_mbox(tnapi->prodmbox, entry);
5932 tnapi->tx_prod = entry;
5933 if (unlikely(tg3_tx_avail(tnapi) <= (MAX_SKB_FRAGS + 1))) {
5942 if (tg3_tx_avail(tnapi) > TG3_TX_WAKEUP_THRESH(tnapi))
5953 entry = tnapi->tx_prod;
5954 tnapi->tx_buffers[entry].skb = NULL;
5956 dma_unmap_addr(&tnapi->tx_buffers[entry], mapping),
5964 dma_unmap_addr(&tnapi->tx_buffers[entry],
6230 struct tg3_napi *tnapi = &tp->napi[j];
6234 if (!tnapi->tx_buffers)
6242 txp = &tnapi->tx_buffers[i];
6259 txp = &tnapi->tx_buffers[i & (TG3_TX_RING_SIZE - 1)];
6287 struct tg3_napi *tnapi = &tp->napi[i];
6289 tnapi->last_tag = 0;
6290 tnapi->last_irq_tag = 0;
6291 tnapi->hw_status->status = 0;
6292 tnapi->hw_status->status_tag = 0;
6293 memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE);
6295 tnapi->tx_prod = 0;
6296 tnapi->tx_cons = 0;
6297 if (tnapi->tx_ring)
6298 memset(tnapi->tx_ring, 0, TG3_TX_RING_BYTES);
6300 tnapi->rx_rcb_ptr = 0;
6301 if (tnapi->rx_rcb)
6302 memset(tnapi->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp));
6322 struct tg3_napi *tnapi = &tp->napi[i];
6324 if (tnapi->tx_ring) {
6326 tnapi->tx_ring, tnapi->tx_desc_mapping);
6327 tnapi->tx_ring = NULL;
6330 kfree(tnapi->tx_buffers);
6331 tnapi->tx_buffers = NULL;
6333 if (tnapi->rx_rcb) {
6335 tnapi->rx_rcb,
6336 tnapi->rx_rcb_mapping);
6337 tnapi->rx_rcb = NULL;
6340 if (tnapi->hw_status) {
6342 tnapi->hw_status,
6343 tnapi->status_mapping);
6344 tnapi->hw_status = NULL;
6380 struct tg3_napi *tnapi = &tp->napi[i];
6383 tnapi->hw_status = pci_alloc_consistent(tp->pdev,
6385 &tnapi->status_mapping);
6386 if (!tnapi->hw_status)
6389 memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE);
6390 sblk = tnapi->hw_status;
6397 tnapi->tx_buffers = kzalloc(sizeof(struct ring_info) *
6400 if (!tnapi->tx_buffers)
6403 tnapi->tx_ring = pci_alloc_consistent(tp->pdev,
6405 &tnapi->tx_desc_mapping);
6406 if (!tnapi->tx_ring)
6418 tnapi->rx_rcb_prod_idx = &sblk->idx[0].rx_producer;
6421 tnapi->rx_rcb_prod_idx = &sblk->rx_jumbo_consumer;
6424 tnapi->rx_rcb_prod_idx = &sblk->reserved;
6427 tnapi->rx_rcb_prod_idx = &sblk->rx_mini_consumer;
6431 tnapi->prodring = &tp->prodring[i];
6440 tnapi->rx_rcb = pci_alloc_consistent(tp->pdev,
6442 &tnapi->rx_rcb_mapping);
6443 if (!tnapi->rx_rcb)
6446 memset(tnapi->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp));
6560 struct tg3_napi *tnapi = &tp->napi[i];
6561 if (tnapi->hw_status)
6562 memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE);
6890 struct tg3_napi *tnapi = &tp->napi[i];
6891 if (tnapi->hw_status) {
6892 tnapi->hw_status->status = 0;
6893 tnapi->hw_status->status_tag = 0;
6895 tnapi->last_tag = 0;
6896 tnapi->last_irq_tag = 0;
7482 struct tg3_napi *tnapi = &tp->napi[0];
7548 memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE);
7552 ((u64) tnapi->status_mapping >> 32));
7554 ((u64) tnapi->status_mapping & 0xffffffff));
7556 if (tnapi->tx_ring) {
7557 tg3_set_bdinfo(tp, txrcb, tnapi->tx_desc_mapping,
7564 if (tnapi->rx_rcb) {
7565 tg3_set_bdinfo(tp, rxrcb, tnapi->rx_rcb_mapping,
7573 for (i = 1, tnapi++; i < tp->irq_cnt; i++, tnapi++) {
7574 u64 mapping = (u64)tnapi->status_mapping;
7579 memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE);
7581 if (tnapi->tx_ring) {
7582 tg3_set_bdinfo(tp, txrcb, tnapi->tx_desc_mapping,
7589 tg3_set_bdinfo(tp, rxrcb, tnapi->rx_rcb_mapping,
8564 struct tg3_napi *tnapi = &tp->napi[irq_num];
8569 name = &tnapi->irq_lbl[0];
8586 return request_irq(tnapi->irq_vec, fn, flags, name, tnapi);
8591 struct tg3_napi *tnapi = &tp->napi[0];
8601 free_irq(tnapi->irq_vec, tnapi);
8613 err = request_irq(tnapi->irq_vec, tg3_test_isr,
8614 IRQF_SHARED | IRQF_SAMPLE_RANDOM, dev->name, tnapi);
8618 tnapi->hw_status->status &= ~SD_STATUS_UPDATED;
8622 tnapi->coal_now);
8627 int_mbox = tr32_mailbox(tnapi->int_mbox);
8641 free_irq(tnapi->irq_vec, tnapi);
8892 struct tg3_napi *tnapi = &tp->napi[i];
8896 free_irq(tnapi->irq_vec, tnapi);
8970 struct tg3_napi *tnapi = &tp->napi[i];
8971 free_irq(tnapi->irq_vec, tnapi);
9012 struct tg3_napi *tnapi = &tp->napi[i];
9013 free_irq(tnapi->irq_vec, tnapi);
10581 struct tg3_napi *tnapi, *rnapi;
10584 tnapi = &tp->napi[0];
10589 tnapi = &tp->napi[1];
10591 coal_now = tnapi->coal_now | rnapi->coal_now;
10687 tg3_set_txd(tnapi, tnapi->tx_prod, map, tx_len, 0, 1);
10689 tnapi->tx_prod++;
10692 tw32_tx_mbox(tnapi->prodmbox, tnapi->tx_prod);
10693 tr32_mailbox(tnapi->prodmbox);
10704 tx_idx = tnapi->hw_status->idx[0].tx_consumer;
10706 if ((tx_idx == tnapi->tx_prod) &&
10714 if (tx_idx != tnapi->tx_prod)
14465 struct tg3_napi *tnapi = &tp->napi[i];
14467 tnapi->tp = tp;
14468 tnapi->tx_pending = TG3_DEF_TX_RING_PENDING;
14470 tnapi->int_mbox = intmbx;
14476 tnapi->consmbox = rcvmbx;
14477 tnapi->prodmbox = sndmbx;
14480 tnapi->coal_now = HOSTCC_MODE_COAL_VEC1_NOW << (i - 1);
14481 netif_napi_add(dev, &tnapi->napi, tg3_poll_msix, 64);
14483 tnapi->coal_now = HOSTCC_MODE_NOW;
14484 netif_napi_add(dev, &tnapi->napi, tg3_poll, 64);