Lines Matching refs:TG3_BDINFO_SIZE
7486 limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 16;
7488 limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 2;
7490 limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE;
7492 for (txrcb = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE;
7493 txrcb < limit; txrcb += TG3_BDINFO_SIZE)
7501 limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 17;
7503 limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 16;
7506 limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 4;
7508 limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE;
7510 for (rxrcb = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE;
7511 rxrcb < limit; rxrcb += TG3_BDINFO_SIZE)
7561 txrcb += TG3_BDINFO_SIZE;
7568 rxrcb += TG3_BDINFO_SIZE;
7586 txrcb += TG3_BDINFO_SIZE;
7594 rxrcb += TG3_BDINFO_SIZE;