Lines Matching refs:REGA
164 #define REGA(a) (*( AREG = (a), &DREG ))
358 REGA(CSR0) = CSR0_STOP;
423 REGA(CSR0) = CSR0_STOP;
428 REGA(CSR0) = CSR0_INIT;
501 REGA(CSR1) = dvma_vtob(&(MEM->init));
502 REGA(CSR2) = dvma_vtob(&(MEM->init)) >> 16;
505 REGA(CSR3) = CSR3_BSWP | CSR3_ACON | CSR3_BCON;
507 REGA(CSR3) = CSR3_BSWP;
536 REGA(CSR3) = CSR3_BSWP;
558 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
588 REGA( CSR0 ) = CSR0_STOP;
590 REGA( CSR0 ) = CSR0_INIT | CSR0_STRT;
624 REGA(CSR0) = CSR0_INEA | CSR0_TDMD | CSR0_STRT;
706 REGA(CSR0) = CSR0_STOP;
707 REGA(CSR3) = CSR3_BSWP;
709 REGA(CSR0) = CSR0_STRT | CSR0_INEA;
744 REGA(CSR0) = CSR0_STOP;
745 REGA(CSR3) = CSR3_BSWP;
747 REGA(CSR0) = CSR0_STRT | CSR0_INEA;
755 REGA(CSR0) = CSR0_INEA;
888 REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */
898 REGA( CSR8+i ) = multicast_table[i];
899 REGA( CSR15 ) = 0; /* Unset promiscuous mode */
906 REGA( CSR3 ) = CSR3_BSWP;
909 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;