Lines Matching defs:SMC_REG
608 #define TCR_REG(lp) SMC_REG(lp, 0x0000, 0)
627 #define EPH_STATUS_REG(lp) SMC_REG(lp, 0x0002, 0)
646 #define RCR_REG(lp) SMC_REG(lp, 0x0004, 0)
663 #define COUNTER_REG(lp) SMC_REG(lp, 0x0006, 0)
668 #define MIR_REG(lp) SMC_REG(lp, 0x0008, 0)
673 #define RPC_REG(lp) SMC_REG(lp, 0x000A, 0)
699 #define CONFIG_REG(lp) SMC_REG(lp, 0x0000, 1)
711 #define BASE_REG(lp) SMC_REG(lp, 0x0002, 1)
716 #define ADDR0_REG(lp) SMC_REG(lp, 0x0004, 1)
717 #define ADDR1_REG(lp) SMC_REG(lp, 0x0006, 1)
718 #define ADDR2_REG(lp) SMC_REG(lp, 0x0008, 1)
723 #define GP_REG(lp) SMC_REG(lp, 0x000A, 1)
728 #define CTL_REG(lp) SMC_REG(lp, 0x000C, 1)
741 #define MMU_CMD_REG(lp) SMC_REG(lp, 0x0000, 2)
755 #define PN_REG(lp) SMC_REG(lp, 0x0002, 2)
760 #define AR_REG(lp) SMC_REG(lp, 0x0003, 2)
766 #define TXFIFO_REG(lp) SMC_REG(lp, 0x0004, 2)
771 #define RXFIFO_REG(lp) SMC_REG(lp, 0x0005, 2)
774 #define FIFO_REG(lp) SMC_REG(lp, 0x0004, 2)
778 #define PTR_REG(lp) SMC_REG(lp, 0x0006, 2)
786 #define DATA_REG(lp) SMC_REG(lp, 0x0008, 2)
791 #define INT_REG(lp) SMC_REG(lp, 0x000C, 2)
796 #define IM_REG(lp) SMC_REG(lp, 0x000D, 2)
809 #define MCAST_REG1(lp) SMC_REG(lp, 0x0000, 3)
810 #define MCAST_REG2(lp) SMC_REG(lp, 0x0002, 3)
811 #define MCAST_REG3(lp) SMC_REG(lp, 0x0004, 3)
812 #define MCAST_REG4(lp) SMC_REG(lp, 0x0006, 3)
817 #define MII_REG(lp) SMC_REG(lp, 0x0008, 3)
828 #define REV_REG(lp) SMC_REG(lp, 0x000A, 3)
834 #define ERCV_REG(lp) SMC_REG(lp, 0x000C, 3)
841 #define EXT_REG(lp) SMC_REG(lp, 0x0000, 7)
955 * be done separately as needed in the main code. The SMC_REG() macro
965 #define SMC_REG(lp, reg, bank) \
976 #define SMC_REG(lp, reg, bank) (reg<<SMC_IO_SHIFT)
997 SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 0, 2)); \
1077 SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 8, 1)); \
1099 SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 4, 2)); \
1117 SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 8, 0)); \