Lines Matching refs:Q_CSR
999 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET);
1000 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT);
1001 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON);
1198 Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1229 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1232 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1262 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST);
1927 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
1948 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
1949 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR));
2558 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
2702 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
2708 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
2794 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK);
3567 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),