Lines Matching refs:PLC
121 * this register in the PLC-S controls the scrambling parameters
133 * this register in the PLC-S controls the scrambling parameters
160 * PLC timing parameter
426 int rev ; /* Revision of PLC-x */
430 outpw(PLC(p,PL_CNTRL_B),0) ;
431 outpw(PLC(p,PL_CNTRL_B),PL_PCM_STOP) ;
432 outpw(PLC(p,PL_CNTRL_A),0) ;
435 * if PLC-S then set control register C
438 rev = inpw(PLC(p,PL_STATUS_A)) & PLC_REV_MASK ;
443 outpw(PLC(p,PL_CNTRL_C),PLCS_CONTROL_C_S) ;
445 outpw(PLC(p,PL_T_FOT_ASS),PLCS_FASSERT_S) ;
446 outpw(PLC(p,PL_T_FOT_DEASS),PLCS_FDEASSERT_S) ;
450 outpw(PLC(p,PL_CNTRL_C),PLCS_CONTROL_C_U) ;
452 outpw(PLC(p,PL_T_FOT_ASS),PLCS_FASSERT_U) ;
453 outpw(PLC(p,PL_T_FOT_DEASS),PLCS_FDEASSERT_U) ;
462 outpw(PLC(p,pltm[i].timer),pltm[i].para) ;
464 (void)inpw(PLC(p,PL_INTR_EVENT)) ; /* clear interrupt event reg */
466 outpw(PLC(p,PL_INTR_MASK),plc_imsk_na); /* enable non active irq's */
477 outpw(PLC(p,PL_CNTRL_B),PL_CLASS_S) ;
492 port = (HW_PTR) (PLC(p,PL_CNTRL_B)) ;
510 state = inpw(PLC(phy,PL_STATUS_A)) & PL_LINE_ST ;
546 if (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL) {
550 outpw(PLC(np,PL_VECTOR_LEN),len-1) ; /* len=nr-1 */
551 outpw(PLC(np,PL_XMIT_VECTOR),n) ;
571 SETMASK(PLC(PA,PL_CNTRL_B),PL_CONFIG_CNTRL,PL_CONFIG_CNTRL) ;
572 SETMASK(PLC(PA,PL_CNTRL_A),PL_SC_REM_LOOP,PL_SC_REM_LOOP) ;
575 CLEAR(PLC(PA,PL_CNTRL_B),PL_CONFIG_CNTRL) ;
576 CLEAR(PLC(PA,PL_CNTRL_A),PL_SC_REM_LOOP) ;
578 CLEAR(PLC(PB,PL_CNTRL_B),PL_CONFIG_CNTRL) ;
579 CLEAR(PLC(PB,PL_CNTRL_A),PL_SC_REM_LOOP) ;
619 * because the PLC does the bit signaling for us,
710 CLEAR(PLC(np,PL_CNTRL_B),PL_LONG) ;
718 outpw(PLC(np,PL_CNTRL_A),0) ;
719 CLEAR(PLC(np,PL_CNTRL_B),PL_PC_JOIN) ;
720 CLEAR(PLC(np,PL_CNTRL_B),PL_LONG) ;
741 CLEAR(PLC(np,PL_CNTRL_B),PL_PC_JOIN) ;
742 CLEAR(PLC(np,PL_CNTRL_B),PL_LONG) ;
764 outpw(PLC(np,PL_INTR_MASK),plc_imsk_na) ;
771 (void)inpw(PLC(np,PL_INTR_EVENT)) ;
774 plc_rev = inpw(PLC(np,PL_STATUS_A)) & PLC_REV_MASK ;
780 * No supernet III PLC, so set Xmit verctor and
792 if (!(inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL))
794 if (((inpw(PLC(np,PL_STATUS_A)) & PLC_REV_MASK) !=
796 !(inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL))
864 i = inpw(PLC(np,PL_CNTRL_B)) & ~PL_PC_LOOP ;
865 outpw(PLC(np,PL_CNTRL_B),i) ; /* must be cleared */
866 outpw(PLC(np,PL_CNTRL_B),i | PL_RLBP) ;
916 SETMASK(PLC(np,PL_CNTRL_A),
918 SETMASK(PLC(np,PL_CNTRL_B),
921 SETMASK(PLC(np,PL_CNTRL_B),PL_PC_JOIN,PL_PC_JOIN) ;
922 SETMASK(PLC(np,PL_CNTRL_B),PL_PC_JOIN,PL_PC_JOIN) ;
958 outpw(PLC(np,PL_INTR_MASK),plc_imsk_act) ;
974 CLEAR(PLC(np,PL_CNTRL_B),PL_PC_JOIN) ;
975 CLEAR(PLC(np,PL_CNTRL_B),PL_LONG) ;
976 CLEAR(PLC(np,PL_INTR_MASK),PL_LE_CTR) ; /* disable LEM int. */
983 SETMASK(PLC(np,PL_CNTRL_B),PL_MAINT,PL_MAINT) ;
985 outpw(PLC(np,PL_CNTRL_A),PL_SC_BYPASS) ;
1012 cntrl = (inpw(PLC(phy,PL_CNTRL_B)) & ~PL_MAINT_LS) |
1032 outpw(PLC(phy,PL_CNTRL_B),cntrl) ;
1059 errors = inpw(PLC(((int) phy->np),PL_LINK_ERR_CTR)) ;
1163 errors = inpw(PLC(((int)phy->np),PL_LINK_ERR_CTR)) ;
1209 outpw(PLC(np,PL_LE_THRESHOLD),threshold) ;
1210 (void)inpw(PLC(np,PL_LINK_ERR_CTR)) ; /* clear error counter */
1213 SETMASK(PLC(np,PL_INTR_MASK),PL_LE_CTR,PL_LE_CTR) ;
1221 CLEAR(PLC(np,PL_INTR_MASK),PL_LE_CTR) ;
1321 outpw(PLC((int)phy->np,PL_LC_LENGTH), TP_LC_LENGTH ) ;
1325 outpw(PLC((int)phy->np,PL_LC_LENGTH), TP_LC_LONGLN ) ;
1329 SETMASK(PLC((int)phy->np,PL_CNTRL_B),PL_LONG,PL_LONG) ;
1333 SETMASK(PLC((int)phy->np,PL_CNTRL_B),PL_LONG,PL_LONG) ;
1614 * Interrupt actions for PLC & PCM events
1657 ((inpw(PLC(np,PL_STATUS_A)) & PLC_REV_MASK) ==
1669 outpw(PLC(np,PL_INTR_MASK),corr_mask);
1707 j = inpw(PLC(np,PL_LE_THRESHOLD)) ;
1708 i = inpw(PLC(np,PL_LINK_ERR_CTR)) ;
1733 switch (inpw(PLC(np,PL_CNTRL_B)) & PL_MATCH_LS) {
1743 reason = inpw(PLC(np,PL_STATUS_B)) & PL_BREAK_REASON ;
1755 DB_PCMN(1,"PLC %d: MDcF = %x\n", np, smc->e.DisconnectFlag);
1757 DB_PCMN(1,"PLC %d: restart (reason %x)\n", np, reason);
1761 DB_PCMN(1,"PLC %d: NO!! restart (reason %x)\n", np, reason);
1770 n = inpw(PLC(np,PL_RCV_VECTOR)) ;
1790 * filter PLC glitch ???
1859 switch (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_STATE) {
1881 switch (inpw(PLC(np,PL_STATUS_A)) & PL_LINE_ST) {
1903 switch (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_STATE) {