Lines Matching refs:SIS_W32
77 #define SIS_W32(reg, val) writel ((val), ioaddr + (reg))
370 SIS_W32(GMIIControl, ctl);
427 SIS_W32(ROMInterface, EEREQ | EEROP | (reg << 10));
442 SIS_W32(IntrMask, 0x00);
443 SIS_W32(IntrStatus, 0xffffffff);
451 SIS_W32(TxControl, 0x1a00);
452 SIS_W32(RxControl, 0x1a00);
753 SIS_W32(IntrStatus, status);
867 SIS_W32(RxHashTable, mc_filter[0]);
868 SIS_W32(RxHashTable + 4, mc_filter[1]);
875 SIS_W32(IntrControl, 0x8000);
877 SIS_W32(IntrControl, 0x0);
888 SIS_W32(TxDescStartAddr, tp->tx_dma);
889 SIS_W32(RxDescStartAddr, tp->rx_dma);
891 SIS_W32(IntrStatus, 0xffffffff);
892 SIS_W32(IntrMask, 0x0);
893 SIS_W32(GMIIControl, 0x0);
894 SIS_W32(TxMacControl, 0x60);
896 SIS_W32(RxHashTable, 0x0);
897 SIS_W32(0x6c, 0x0);
898 SIS_W32(RxWolCtrl, 0x0);
899 SIS_W32(RxWolData, 0x0);
906 SIS_W32(IntrMask, sis190_intr_mask);
908 SIS_W32(TxControl, 0x1a00 | CmdTxEnb);
909 SIS_W32(RxControl, 0x1a1d);
1001 SIS_W32(StationControl, p->ctl);
1004 SIS_W32(RGDelay, 0x0441);
1005 SIS_W32(RGDelay, 0x0440);
1234 SIS_W32(TxControl, 0x1a00 | CmdReset | CmdTxEnb);
1562 SIS_W32(IntrMask, 0x0000);