Lines Matching defs:QLCNIC_CAM_RAM
573 #define QLCNIC_CAM_RAM(reg) (QLCNIC_CAM_RAM_BASE + (reg))
574 #define QLCNIC_FW_VERSION_MAJOR (QLCNIC_CAM_RAM(0x150))
575 #define QLCNIC_FW_VERSION_MINOR (QLCNIC_CAM_RAM(0x154))
576 #define QLCNIC_FW_VERSION_SUB (QLCNIC_CAM_RAM(0x158))
577 #define QLCNIC_ROM_LOCK_ID (QLCNIC_CAM_RAM(0x100))
578 #define QLCNIC_PHY_LOCK_ID (QLCNIC_CAM_RAM(0x120))
579 #define QLCNIC_CRB_WIN_LOCK_ID (QLCNIC_CAM_RAM(0x124))
581 #define NIC_CRB_BASE (QLCNIC_CAM_RAM(0x200))
582 #define NIC_CRB_BASE_2 (QLCNIC_CAM_RAM(0x700))
605 #define CRB_FW_CAPABILITIES_1 (QLCNIC_CAM_RAM(0x128))
606 #define CRB_MAC_BLOCK_START (QLCNIC_CAM_RAM(0x1c0))
688 #define QLCNIC_PORT_MODE_ADDR (QLCNIC_CAM_RAM(0x24))
689 #define QLCNIC_WOL_PORT_MODE (QLCNIC_CAM_RAM(0x198))
691 #define QLCNIC_WOL_CONFIG_NV (QLCNIC_CAM_RAM(0x184))
692 #define QLCNIC_WOL_CONFIG (QLCNIC_CAM_RAM(0x188))
695 #define QLCNIC_PEG_TUNE_CAPABILITY (QLCNIC_CAM_RAM(0x02c))
697 #define QLCNIC_DMA_WATCHDOG_CTRL (QLCNIC_CAM_RAM(0x14))
698 #define QLCNIC_PEG_ALIVE_COUNTER (QLCNIC_CAM_RAM(0xb0))
699 #define QLCNIC_PEG_HALT_STATUS1 (QLCNIC_CAM_RAM(0xa8))
700 #define QLCNIC_PEG_HALT_STATUS2 (QLCNIC_CAM_RAM(0xac))
701 #define QLCNIC_CRB_DEV_REF_COUNT (QLCNIC_CAM_RAM(0x138))
702 #define QLCNIC_CRB_DEV_STATE (QLCNIC_CAM_RAM(0x140))
704 #define QLCNIC_CRB_DRV_STATE (QLCNIC_CAM_RAM(0x144))
705 #define QLCNIC_CRB_DRV_SCRATCH (QLCNIC_CAM_RAM(0x148))
706 #define QLCNIC_CRB_DEV_PARTITION_INFO (QLCNIC_CAM_RAM(0x14c))
707 #define QLCNIC_CRB_DRV_IDC_VER (QLCNIC_CAM_RAM(0x174))
708 #define QLCNIC_CRB_DEV_NPAR_STATE (QLCNIC_CAM_RAM(0x19c))