Lines Matching defs:port_regs
107 struct ql3xxx_port_registers __iomem *port_regs =
114 &port_regs->CommonRegs.semaphoreReg);
115 value = readl(&port_regs->CommonRegs.semaphoreReg);
125 struct ql3xxx_port_registers __iomem *port_regs =
127 writel(sem_mask, &port_regs->CommonRegs.semaphoreReg);
128 readl(&port_regs->CommonRegs.semaphoreReg);
133 struct ql3xxx_port_registers __iomem *port_regs =
137 writel((sem_mask | sem_bits), &port_regs->CommonRegs.semaphoreReg);
138 value = readl(&port_regs->CommonRegs.semaphoreReg);
169 struct ql3xxx_port_registers __iomem *port_regs =
173 &port_regs->CommonRegs.ispControlStatus);
174 readl(&port_regs->CommonRegs.ispControlStatus);
278 struct ql3xxx_port_registers __iomem *port_regs =
281 ql_write_common_reg_l(qdev, &port_regs->CommonRegs.ispInterruptMaskReg,
288 struct ql3xxx_port_registers __iomem *port_regs =
291 ql_write_common_reg_l(qdev, &port_regs->CommonRegs.ispInterruptMaskReg,
380 struct ql3xxx_port_registers __iomem *port_regs =
382 u32 *spir = &port_regs->CommonRegs.serialPortInterfaceReg;
399 struct ql3xxx_port_registers __iomem *port_regs =
401 u32 *spir = &port_regs->CommonRegs.serialPortInterfaceReg;
468 struct ql3xxx_port_registers __iomem *port_regs =
470 u32 *spir = &port_regs->CommonRegs.serialPortInterfaceReg;
484 struct ql3xxx_port_registers __iomem *port_regs =
486 u32 *spir = &port_regs->CommonRegs.serialPortInterfaceReg;
567 struct ql3xxx_port_registers __iomem *port_regs =
573 temp = ql_read_page0_reg(qdev, &port_regs->macMIIStatusReg);
584 struct ql3xxx_port_registers __iomem *port_regs =
601 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
604 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
612 struct ql3xxx_port_registers __iomem *port_regs =
616 if (ql_read_page0_reg(qdev, &port_regs->macMIIMgmtControlReg) &
629 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
632 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
642 struct ql3xxx_port_registers __iomem *port_regs =
653 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
656 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtDataReg, value);
673 struct ql3xxx_port_registers __iomem *port_regs =
685 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
688 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
691 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
700 temp = ql_read_page0_reg(qdev, &port_regs->macMIIMgmtDataReg);
711 struct ql3xxx_port_registers __iomem *port_regs =
721 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
724 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtDataReg, value);
740 struct ql3xxx_port_registers __iomem *port_regs =
750 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
753 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
756 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
765 temp = ql_read_page0_reg(qdev, &port_regs->macMIIMgmtDataReg);
1041 struct ql3xxx_port_registers __iomem *port_regs =
1051 ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value);
1053 ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value);
1061 struct ql3xxx_port_registers __iomem *port_regs =
1071 ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value);
1073 ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value);
1081 struct ql3xxx_port_registers __iomem *port_regs =
1091 ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value);
1093 ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value);
1101 struct ql3xxx_port_registers __iomem *port_regs =
1111 ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value);
1113 ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value);
1121 struct ql3xxx_port_registers __iomem *port_regs =
1133 ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value);
1135 ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value);
1143 struct ql3xxx_port_registers __iomem *port_regs =
1157 temp = ql_read_page0_reg(qdev, &port_regs->portStatus);
1173 struct ql3xxx_port_registers __iomem *port_regs =
1187 temp = ql_read_page0_reg(qdev, &port_regs->portStatus);
1209 struct ql3xxx_port_registers __iomem *port_regs =
1222 temp = ql_read_page0_reg(qdev, &port_regs->portStatus);
1247 struct ql3xxx_port_registers __iomem *port_regs =
1262 ql_read_common_reg(qdev, &port_regs->CommonRegs.ispControlStatus);
1271 struct ql3xxx_port_registers __iomem *port_regs =
1277 &port_regs->CommonRegs.ispControlStatus,
1284 &port_regs->CommonRegs.ispControlStatus,
1301 struct ql3xxx_port_registers __iomem *port_regs =
1317 temp = ql_read_page0_reg(qdev, &port_regs->portStatus);
1419 struct ql3xxx_port_registers __iomem *port_regs =
1433 temp = ql_read_page0_reg(qdev, &port_regs->portStatus);
1620 struct ql3xxx_port_registers __iomem *port_regs =
1630 &port_regs->macMIIMgmtControlReg, 0x0f00000);
1635 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
1761 struct ql3xxx_port_registers __iomem *port_regs =
1766 reg = ql_read_page0_reg(qdev, &port_regs->mac0ConfigReg);
1768 reg = ql_read_page0_reg(qdev, &port_regs->mac1ConfigReg);
1845 struct ql3xxx_port_registers __iomem *port_regs =
1859 &port_regs->CommonRegs.rxSmallQProducerIndex);
1871 struct ql3xxx_port_registers __iomem *port_regs =
1912 &port_regs->CommonRegs.rxLargeQProducerIndex);
2190 struct ql3xxx_port_registers __iomem *port_regs =
2201 &port_regs->CommonRegs.rspQConsumerIndex);
2214 struct ql3xxx_port_registers __iomem *port_regs =
2221 &port_regs->CommonRegs.ispControlStatus);
2237 &port_regs->PortFatalErrStatus);
2471 struct ql3xxx_port_registers __iomem *port_regs =
2511 &port_regs->CommonRegs.reqQProducerIndex,
3012 struct ql3xxx_port_registers __iomem *port_regs =
3014 u32 *spir = &port_regs->CommonRegs.serialPortInterfaceReg;
3016 (void __iomem *)port_regs;
3125 &port_regs->CommonRegs.
3129 &port_regs->CommonRegs.
3138 value = ql_read_page0_reg(qdev, &port_regs->portStatus);
3148 ql_write_page0_reg(qdev, &port_regs->tcpMaxWindow, value);
3158 ql_write_page0_reg(qdev, &port_regs->ExternalHWConfig, value);
3159 ql_write_page0_reg(qdev, &port_regs->InternalChipConfig,
3168 &port_regs->mac1MaxFrameLengthReg,
3172 &port_regs->mac0MaxFrameLengthReg,
3189 ql_write_page0_reg(qdev, &port_regs->macAddrIndirectPtrReg,
3191 ql_write_page0_reg(qdev, &port_regs->macAddrDataReg,
3198 ql_write_page0_reg(qdev, &port_regs->macAddrIndirectPtrReg,
3200 ql_write_page0_reg(qdev, &port_regs->macAddrDataReg,
3205 ql_write_page0_reg(qdev, &port_regs->macAddrIndirectPtrReg,
3210 ql_write_page0_reg(qdev, &port_regs->ipAddrIndexReg,
3213 ql_write_page0_reg(qdev, &port_regs->ipAddrDataReg, 0);
3215 ql_write_page0_reg(qdev, &port_regs->ipAddrIndexReg,
3218 ql_write_page0_reg(qdev, &port_regs->ipAddrDataReg, 0);
3224 &port_regs->portControl,
3228 value = ql_read_page0_reg(qdev, &port_regs->portStatus);
3248 ql_write_page0_reg(qdev, &port_regs->functionControl,
3254 ql_write_page0_reg(qdev, &port_regs->portControl,
3268 struct ql3xxx_port_registers __iomem *port_regs =
3282 &port_regs->CommonRegs.ispControlStatus,
3294 &port_regs->CommonRegs.ispControlStatus);
3306 ql_read_common_reg(qdev, &port_regs->CommonRegs.ispControlStatus);
3311 &port_regs->CommonRegs.
3319 &port_regs->CommonRegs.
3330 &port_regs->CommonRegs.
3347 struct ql3xxx_port_registers __iomem *port_regs =
3354 ql_read_common_reg_l(qdev, &port_regs->CommonRegs.ispControlStatus);
3356 port_status = ql_read_page0_reg(qdev, &port_regs->portStatus);
3577 struct ql3xxx_port_registers __iomem *port_regs =
3592 ql_write_page0_reg(qdev, &port_regs->macAddrIndirectPtrReg,
3594 ql_write_page0_reg(qdev, &port_regs->macAddrDataReg,
3600 ql_write_page0_reg(qdev, &port_regs->macAddrIndirectPtrReg,
3602 ql_write_page0_reg(qdev, &port_regs->macAddrDataReg,
3633 struct ql3xxx_port_registers __iomem *port_regs =
3670 &port_regs->CommonRegs.
3679 &port_regs->CommonRegs.
3692 &port_regs->
3737 struct ql3xxx_port_registers __iomem *port_regs =
3741 value = ql_read_page0_reg_l(qdev, &port_regs->portStatus);