Lines Matching refs:mix_ctl
429 union cvmx_mixx_ctl mix_ctl;
433 mix_ctl.u64 = 0;
434 cvmx_write_csr(CVMX_MIXX_CTL(p->port), mix_ctl.u64);
436 mix_ctl.u64 = cvmx_read_csr(CVMX_MIXX_CTL(p->port));
437 } while (mix_ctl.s.busy);
438 mix_ctl.s.reset = 1;
439 cvmx_write_csr(CVMX_MIXX_CTL(p->port), mix_ctl.u64);
697 union cvmx_mixx_ctl mix_ctl;
737 mix_ctl.u64 = cvmx_read_csr(CVMX_MIXX_CTL(port));
740 if (mix_ctl.s.reset) {
741 mix_ctl.s.reset = 0;
742 cvmx_write_csr(CVMX_MIXX_CTL(port), mix_ctl.u64);
744 mix_ctl.u64 = cvmx_read_csr(CVMX_MIXX_CTL(port));
745 } while (mix_ctl.s.reset);
776 mix_ctl.u64 = 0;
777 mix_ctl.s.crc_strip = 1; /* Strip the ending CRC */
778 mix_ctl.s.en = 1; /* Enable the port */
779 mix_ctl.s.nbtarb = 0; /* Arbitration mode */
781 mix_ctl.s.mrq_hwm = 1;
782 cvmx_write_csr(CVMX_MIXX_CTL(port), mix_ctl.u64);