Lines Matching refs:PORT
112 #define PORT p->cmdr_addr
148 #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);}
149 #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG))
256 outw(80,PORT+L_ADDRREG);
257 if(inw(PORT+L_ADDRREG) != 80)
261 outw(0,PORT+L_ADDRREG);
262 outw((short)isa0,PORT+L_BUSIF); /* write ISA 0: DMA_R : isa0 * 50ns */
263 outw(1,PORT+L_ADDRREG);
264 outw((short)isa1,PORT+L_BUSIF); /* write ISA 1: DMA_W : isa1 * 50ns */
266 outw(CSR0,PORT+L_ADDRREG); /* switch back to CSR0 */
304 outw(inw(PORT+L_RESET),PORT+L_RESET); /* that's the hard way */
441 outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */
450 outw(88,PORT+L_ADDRREG);
451 if(inw(PORT+L_ADDRREG) == 88) {
453 v = inw(PORT+L_DATAREG);
455 outw(89,PORT+L_ADDRREG);
456 v |= inw(PORT+L_DATAREG);
576 if(inw(PORT+L_DATAREG) & (CSR0_IDON | CSR0_MERR) )
789 outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */
840 if(inw(PORT+L_DATAREG) & CSR0_IDON) {
846 printk(KERN_ERR "%s: can't init lance, status: %04x\n",dev->name,(int) inw(PORT+L_DATAREG));
868 csr0 = inw(PORT+L_DATAREG);
1044 dev->name,(int) rmdstat,csr0,(int) inw(PORT+L_DATAREG) );