Lines Matching defs:writereg
148 #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);}
150 #define writedatareg(val) { writereg(val,CSR0); }
251 writereg(CSR0_STOP | CSR0_CLRALL,CSR0); /* STOP */
260 writereg( (csr80 & 0x3fff) ,80); /* FIFO watermarks */
516 writereg(CSR0_INIT|CSR0_INEA,CSR0); /* trigger interrupt */
555 writereg(CSR0_CLRALL|CSR0_STOP,CSR0);
566 writereg(0,CSR3); /* busmaster/no word-swap */
568 writereg(pib & 0xffff,CSR1);
569 writereg(pib >> 16,CSR2);
571 writereg(CSR0_INIT,CSR0); /* this changes L_ADDRREG to CSR0 */