Lines Matching refs:adapter
45 static void netxen_nic_io_write_128M(struct netxen_adapter *adapter,
47 static u32 netxen_nic_io_read_128M(struct netxen_adapter *adapter,
65 #define PCI_OFFSET_FIRST_RANGE(adapter, off) \
66 ((adapter)->ahw.pci_base0 + (off))
67 #define PCI_OFFSET_SECOND_RANGE(adapter, off) \
68 ((adapter)->ahw.pci_base1 + (off) - SECOND_PAGE_GROUP_START)
69 #define PCI_OFFSET_THIRD_RANGE(adapter, off) \
70 ((adapter)->ahw.pci_base2 + (off) - THIRD_PAGE_GROUP_START)
72 static void __iomem *pci_base_offset(struct netxen_adapter *adapter,
76 return PCI_OFFSET_FIRST_RANGE(adapter, off);
79 return PCI_OFFSET_SECOND_RANGE(adapter, off);
82 return PCI_OFFSET_THIRD_RANGE(adapter, off);
323 netxen_pcie_sem_lock(struct netxen_adapter *adapter, int sem, u32 id_reg)
328 done = NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM_LOCK(sem)));
337 NXWR32(adapter, id_reg, adapter->portnum);
343 netxen_pcie_sem_unlock(struct netxen_adapter *adapter, int sem)
345 NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM_UNLOCK(sem)));
348 int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port)
350 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
351 NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_1+(0x10000*port), 0x1447);
352 NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_0+(0x10000*port), 0x5);
359 int netxen_niu_disable_xg_port(struct netxen_adapter *adapter)
362 u32 port = adapter->physical_port;
364 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
371 if (NXWR32(adapter,
386 int netxen_p2_nic_set_promisc(struct netxen_adapter *adapter, u32 mode)
391 u32 port = adapter->physical_port;
392 u16 board_type = adapter->ahw.board_type;
397 mac_cfg = NXRD32(adapter, NETXEN_NIU_XGE_CONFIG_0 + (0x10000 * port));
399 NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_0 + (0x10000 * port), mac_cfg);
405 NXWR32(adapter, NETXEN_NIU_FRAME_COUNT_SELECT, reg);
409 while (NXRD32(adapter, NETXEN_NIU_FRAME_COUNT) && ++cnt < 20)
414 reg = NXRD32(adapter,
427 NXWR32(adapter,
432 NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_0 + (0x10000 * port), mac_cfg);
437 int netxen_p2_nic_set_mac_addr(struct netxen_adapter *adapter, u8 *addr)
442 u8 phy = adapter->physical_port;
455 if (NXWR32(adapter, reg_lo, mac_lo) || NXWR32(adapter, reg_hi, mac_hi))
457 if (NXWR32(adapter, reg_lo, mac_lo) || NXWR32(adapter, reg_hi, mac_hi))
464 netxen_nic_enable_mcast_filter(struct netxen_adapter *adapter)
467 u16 port = adapter->physical_port;
468 u8 *addr = adapter->mac_addr;
470 if (adapter->mc_enabled)
473 val = NXRD32(adapter, NETXEN_MAC_ADDR_CNTL_REG);
475 NXWR32(adapter, NETXEN_MAC_ADDR_CNTL_REG, val);
479 NXWR32(adapter, NETXEN_UNICAST_ADDR(port, 0), val);
480 NXWR32(adapter, NETXEN_UNICAST_ADDR(port, 0)+4, val);
484 NXWR32(adapter, NETXEN_UNICAST_ADDR(port, 1), val);
486 NXWR32(adapter, NETXEN_UNICAST_ADDR(port, 1)+4, val);
488 adapter->mc_enabled = 1;
493 netxen_nic_disable_mcast_filter(struct netxen_adapter *adapter)
496 u16 port = adapter->physical_port;
497 u8 *addr = adapter->mac_addr;
499 if (!adapter->mc_enabled)
502 val = NXRD32(adapter, NETXEN_MAC_ADDR_CNTL_REG);
504 NXWR32(adapter, NETXEN_MAC_ADDR_CNTL_REG, val);
507 NXWR32(adapter, NETXEN_UNICAST_ADDR(port, 0), val);
509 NXWR32(adapter, NETXEN_UNICAST_ADDR(port, 0)+4, val);
511 NXWR32(adapter, NETXEN_UNICAST_ADDR(port, 1), 0);
512 NXWR32(adapter, NETXEN_UNICAST_ADDR(port, 1)+4, 0);
514 adapter->mc_enabled = 0;
519 netxen_nic_set_mcast_addr(struct netxen_adapter *adapter,
523 u16 port = adapter->physical_port;
528 NXWR32(adapter, NETXEN_MCAST_ADDR(port, index), hi);
529 NXWR32(adapter, NETXEN_MCAST_ADDR(port, index)+4, lo);
536 struct netxen_adapter *adapter = netdev_priv(netdev);
545 adapter->set_promisc(adapter,
549 netxen_nic_disable_mcast_filter(adapter);
555 adapter->set_promisc(adapter,
557 netxen_nic_disable_mcast_filter(adapter);
561 adapter->set_promisc(adapter, NETXEN_NIU_ALLMULTI_MODE);
563 netdev_mc_count(netdev) > adapter->max_mc_count) {
564 netxen_nic_disable_mcast_filter(adapter);
568 netxen_nic_enable_mcast_filter(adapter);
572 netxen_nic_set_mcast_addr(adapter, i++, ha->addr);
575 while (i < adapter->max_mc_count)
576 netxen_nic_set_mcast_addr(adapter, i++, null_addr);
580 netxen_send_cmd_descs(struct netxen_adapter *adapter,
590 if (adapter->is_up != NETXEN_ADAPTER_UP_MAGIC)
593 tx_ring = adapter->tx_ring;
622 netxen_nic_update_cmd_producer(adapter, tx_ring);
630 nx_p3_sre_macaddr_change(struct netxen_adapter *adapter, u8 *addr, unsigned op)
639 word = NX_MAC_EVENT | ((u64)adapter->portnum << 16);
646 return netxen_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1);
649 static int nx_p3_nic_add_mac(struct netxen_adapter *adapter,
660 list_move_tail(head, &adapter->mac_list);
668 adapter->netdev->name);
672 list_add_tail(&cur->list, &adapter->mac_list);
673 return nx_p3_sre_macaddr_change(adapter,
679 struct netxen_adapter *adapter = netdev_priv(netdev);
687 if (adapter->is_up != NETXEN_ADAPTER_UP_MAGIC)
690 list_splice_tail_init(&adapter->mac_list, &del_list);
692 nx_p3_nic_add_mac(adapter, adapter->mac_addr, &del_list);
693 nx_p3_nic_add_mac(adapter, bcast_addr, &del_list);
701 (netdev_mc_count(netdev) > adapter->max_mc_count)) {
708 nx_p3_nic_add_mac(adapter, ha->addr, &del_list);
712 adapter->set_promisc(adapter, mode);
717 nx_p3_sre_macaddr_change(adapter,
724 int netxen_p3_nic_set_promisc(struct netxen_adapter *adapter, u32 mode)
734 ((u64)adapter->portnum << 16);
739 return netxen_send_cmd_descs(adapter,
743 void netxen_p3_free_mac_list(struct netxen_adapter *adapter)
746 struct list_head *head = &adapter->mac_list;
750 nx_p3_sre_macaddr_change(adapter,
757 int netxen_p3_nic_set_mac_addr(struct netxen_adapter *adapter, u8 *addr)
760 netxen_p3_nic_set_multi(adapter->netdev);
769 int netxen_config_intr_coalesce(struct netxen_adapter *adapter)
780 word[0] = NETXEN_CONFIG_INTR_COALESCE | ((u64)adapter->portnum << 16);
783 memcpy(&word[0], &adapter->coal, sizeof(adapter->coal));
787 rv = netxen_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1);
796 int netxen_config_hw_lro(struct netxen_adapter *adapter, int enable)
802 if ((adapter->flags & NETXEN_NIC_LRO_ENABLED) == enable)
809 word = NX_NIC_H2C_OPCODE_CONFIG_HW_LRO | ((u64)adapter->portnum << 16);
814 rv = netxen_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1);
820 adapter->flags ^= NETXEN_NIC_LRO_ENABLED;
825 int netxen_config_bridged_mode(struct netxen_adapter *adapter, int enable)
831 if (!!(adapter->flags & NETXEN_NIC_BRIDGE_ENABLED) == enable)
839 ((u64)adapter->portnum << 16);
844 rv = netxen_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1);
850 adapter->flags ^= NETXEN_NIC_BRIDGE_ENABLED;
858 int netxen_config_rss(struct netxen_adapter *adapter, int enable)
872 word = NX_NIC_H2C_OPCODE_CONFIG_RSS | ((u64)adapter->portnum << 16);
894 rv = netxen_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1);
897 adapter->netdev->name);
903 int netxen_config_ipaddr(struct netxen_adapter *adapter, u32 ip, int cmd)
912 word = NX_NIC_H2C_OPCODE_CONFIG_IPADDR | ((u64)adapter->portnum << 16);
918 rv = netxen_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1);
921 adapter->netdev->name,
927 int netxen_linkevent_request(struct netxen_adapter *adapter, int enable)
936 word = NX_NIC_H2C_OPCODE_GET_LINKEVENT | ((u64)adapter->portnum << 16);
940 rv = netxen_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1);
943 adapter->netdev->name);
949 int netxen_send_lro_cleanup(struct netxen_adapter *adapter)
959 ((u64)adapter->portnum << 16) |
964 rv = netxen_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1);
967 adapter->netdev->name);
981 struct netxen_adapter *adapter = netdev_priv(netdev);
985 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
996 if (adapter->set_mtu)
997 rc = adapter->set_mtu(adapter, mtu);
1005 static int netxen_get_flash_block(struct netxen_adapter *adapter, int base,
1014 if (netxen_rom_fast_read(adapter, addr, &v) == -1)
1022 if (netxen_rom_fast_read(adapter, addr, &v) == -1)
1031 int netxen_get_flash_mac_addr(struct netxen_adapter *adapter, u64 *mac)
1036 offset = NX_FW_MAC_ADDR_OFFSET + (adapter->portnum * sizeof(u64));
1038 if (netxen_get_flash_block(adapter, offset, sizeof(u64), pmac) == -1)
1044 (adapter->portnum * sizeof(u64));
1046 if (netxen_get_flash_block(adapter,
1056 int netxen_p3_get_mac_addr(struct netxen_adapter *adapter, u64 *mac)
1059 int pci_func = adapter->ahw.pci_func;
1064 mac_lo = NXRD32(adapter, crbaddr);
1065 mac_hi = NXRD32(adapter, crbaddr+4);
1079 netxen_nic_pci_set_crbwindow_128M(struct netxen_adapter *adapter,
1084 u8 func = adapter->ahw.pci_func;
1086 if (adapter->ahw.crb_win == window)
1089 offset = PCI_OFFSET_SECOND_RANGE(adapter,
1098 dev_warn(&adapter->pdev->dev,
1106 adapter->ahw.crb_win = window;
1117 netxen_nic_pci_get_crb_addr_2M(struct netxen_adapter *adapter,
1134 *addr = adapter->ahw.pci_base0 + m->start_2M +
1142 *addr = adapter->ahw.pci_base0 + CRB_INDIRECT_2M +
1153 netxen_nic_pci_set_crbwindow_2M(struct netxen_adapter *adapter, ulong off)
1156 void __iomem *addr = adapter->ahw.pci_base0 + CRB_WINDOW_2M;
1165 dev_warn(&adapter->pdev->dev,
1172 netxen_nic_map_indirect_address_128M(struct netxen_adapter *adapter,
1182 addr = pci_base_offset(adapter, off);
1186 if (adapter->ahw.pci_len0 == 0)
1189 mem_base = pci_resource_start(adapter->pdev, 0);
1198 netxen_nic_hw_write_wx_128M(struct netxen_adapter *adapter, ulong off, u32 data)
1203 addr = netxen_nic_map_indirect_address_128M(adapter, off, &mem_ptr);
1208 netxen_nic_io_write_128M(adapter, addr, data);
1210 write_lock_irqsave(&adapter->ahw.crb_lock, flags);
1211 netxen_nic_pci_set_crbwindow_128M(adapter, 0);
1213 netxen_nic_pci_set_crbwindow_128M(adapter,
1215 write_unlock_irqrestore(&adapter->ahw.crb_lock, flags);
1225 netxen_nic_hw_read_wx_128M(struct netxen_adapter *adapter, ulong off)
1231 addr = netxen_nic_map_indirect_address_128M(adapter, off, &mem_ptr);
1236 data = netxen_nic_io_read_128M(adapter, addr);
1238 write_lock_irqsave(&adapter->ahw.crb_lock, flags);
1239 netxen_nic_pci_set_crbwindow_128M(adapter, 0);
1241 netxen_nic_pci_set_crbwindow_128M(adapter,
1243 write_unlock_irqrestore(&adapter->ahw.crb_lock, flags);
1253 netxen_nic_hw_write_wx_2M(struct netxen_adapter *adapter, ulong off, u32 data)
1259 rv = netxen_nic_pci_get_crb_addr_2M(adapter, off, &addr);
1268 write_lock_irqsave(&adapter->ahw.crb_lock, flags);
1269 crb_win_lock(adapter);
1270 netxen_nic_pci_set_crbwindow_2M(adapter, off);
1272 crb_win_unlock(adapter);
1273 write_unlock_irqrestore(&adapter->ahw.crb_lock, flags);
1277 dev_err(&adapter->pdev->dev,
1284 netxen_nic_hw_read_wx_2M(struct netxen_adapter *adapter, ulong off)
1291 rv = netxen_nic_pci_get_crb_addr_2M(adapter, off, &addr);
1298 write_lock_irqsave(&adapter->ahw.crb_lock, flags);
1299 crb_win_lock(adapter);
1300 netxen_nic_pci_set_crbwindow_2M(adapter, off);
1302 crb_win_unlock(adapter);
1303 write_unlock_irqrestore(&adapter->ahw.crb_lock, flags);
1307 dev_err(&adapter->pdev->dev,
1314 static void netxen_nic_io_write_128M(struct netxen_adapter *adapter,
1317 read_lock(&adapter->ahw.crb_lock);
1319 read_unlock(&adapter->ahw.crb_lock);
1322 static u32 netxen_nic_io_read_128M(struct netxen_adapter *adapter,
1327 read_lock(&adapter->ahw.crb_lock);
1329 read_unlock(&adapter->ahw.crb_lock);
1334 static void netxen_nic_io_write_2M(struct netxen_adapter *adapter,
1340 static u32 netxen_nic_io_read_2M(struct netxen_adapter *adapter,
1347 netxen_get_ioaddr(struct netxen_adapter *adapter, u32 offset)
1351 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1354 addr = PCI_OFFSET_SECOND_RANGE(adapter, offset);
1356 addr = NETXEN_CRB_NORMALIZE(adapter, offset);
1358 WARN_ON(netxen_nic_pci_get_crb_addr_2M(adapter,
1366 netxen_nic_pci_set_window_128M(struct netxen_adapter *adapter,
1382 netxen_nic_pci_set_window_2M(struct netxen_adapter *adapter,
1389 writel(window, adapter->ahw.ocm_win_crb);
1391 readl(adapter->ahw.ocm_win_crb);
1393 adapter->ahw.ocm_win = window;
1399 netxen_nic_pci_mem_access_direct(struct netxen_adapter *adapter, u64 off,
1407 spin_lock(&adapter->ahw.mem_lock);
1409 ret = adapter->pci_set_window(adapter, off, &start);
1413 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
1414 addr = adapter->ahw.pci_base0 + start;
1416 addr = pci_base_offset(adapter, start);
1420 mem_base = pci_resource_start(adapter->pdev, 0) +
1437 spin_unlock(&adapter->ahw.mem_lock);
1445 netxen_pci_camqm_read_2M(struct netxen_adapter *adapter, u64 off, u64 *data)
1447 void __iomem *addr = adapter->ahw.pci_base0 +
1450 spin_lock(&adapter->ahw.mem_lock);
1452 spin_unlock(&adapter->ahw.mem_lock);
1456 netxen_pci_camqm_write_2M(struct netxen_adapter *adapter, u64 off, u64 data)
1458 void __iomem *addr = adapter->ahw.pci_base0 +
1461 spin_lock(&adapter->ahw.mem_lock);
1463 spin_unlock(&adapter->ahw.mem_lock);
1469 netxen_nic_pci_mem_write_128M(struct netxen_adapter *adapter,
1483 mem_crb = pci_base_offset(adapter,
1494 mem_crb = pci_base_offset(adapter,
1506 if (adapter->ahw.pci_len0 != 0) {
1507 return netxen_nic_pci_mem_access_direct(adapter,
1515 spin_lock(&adapter->ahw.mem_lock);
1516 netxen_nic_pci_set_crbwindow_128M(adapter, 0);
1534 dev_err(&adapter->pdev->dev,
1540 netxen_nic_pci_set_crbwindow_128M(adapter, NETXEN_WINDOW_ONE);
1541 spin_unlock(&adapter->ahw.mem_lock);
1546 netxen_nic_pci_mem_read_128M(struct netxen_adapter *adapter,
1561 mem_crb = pci_base_offset(adapter,
1572 mem_crb = pci_base_offset(adapter,
1584 if (adapter->ahw.pci_len0 != 0) {
1585 return netxen_nic_pci_mem_access_direct(adapter,
1593 spin_lock(&adapter->ahw.mem_lock);
1594 netxen_nic_pci_set_crbwindow_128M(adapter, 0);
1609 dev_err(&adapter->pdev->dev,
1621 netxen_nic_pci_set_crbwindow_128M(adapter, NETXEN_WINDOW_ONE);
1622 spin_unlock(&adapter->ahw.mem_lock);
1628 netxen_nic_pci_mem_write_2M(struct netxen_adapter *adapter,
1642 mem_crb = netxen_get_ioaddr(adapter,
1648 mem_crb = netxen_get_ioaddr(adapter,
1654 return netxen_nic_pci_mem_access_direct(adapter, off, &data, 1);
1661 spin_lock(&adapter->ahw.mem_lock);
1683 dev_err(&adapter->pdev->dev,
1689 spin_unlock(&adapter->ahw.mem_lock);
1695 netxen_nic_pci_mem_read_2M(struct netxen_adapter *adapter,
1710 mem_crb = netxen_get_ioaddr(adapter,
1716 mem_crb = netxen_get_ioaddr(adapter,
1722 return netxen_nic_pci_mem_access_direct(adapter,
1731 spin_lock(&adapter->ahw.mem_lock);
1746 dev_err(&adapter->pdev->dev,
1756 spin_unlock(&adapter->ahw.mem_lock);
1762 netxen_setup_hwops(struct netxen_adapter *adapter)
1764 adapter->init_port = netxen_niu_xg_init_port;
1765 adapter->stop_port = netxen_niu_disable_xg_port;
1767 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1768 adapter->crb_read = netxen_nic_hw_read_wx_128M,
1769 adapter->crb_write = netxen_nic_hw_write_wx_128M,
1770 adapter->pci_set_window = netxen_nic_pci_set_window_128M,
1771 adapter->pci_mem_read = netxen_nic_pci_mem_read_128M,
1772 adapter->pci_mem_write = netxen_nic_pci_mem_write_128M,
1773 adapter->io_read = netxen_nic_io_read_128M,
1774 adapter->io_write = netxen_nic_io_write_128M,
1776 adapter->macaddr_set = netxen_p2_nic_set_mac_addr;
1777 adapter->set_multi = netxen_p2_nic_set_multi;
1778 adapter->set_mtu = netxen_nic_set_mtu_xgb;
1779 adapter->set_promisc = netxen_p2_nic_set_promisc;
1782 adapter->crb_read = netxen_nic_hw_read_wx_2M,
1783 adapter->crb_write = netxen_nic_hw_write_wx_2M,
1784 adapter->pci_set_window = netxen_nic_pci_set_window_2M,
1785 adapter->pci_mem_read = netxen_nic_pci_mem_read_2M,
1786 adapter->pci_mem_write = netxen_nic_pci_mem_write_2M,
1787 adapter->io_read = netxen_nic_io_read_2M,
1788 adapter->io_write = netxen_nic_io_write_2M,
1790 adapter->set_mtu = nx_fw_cmd_set_mtu;
1791 adapter->set_promisc = netxen_p3_nic_set_promisc;
1792 adapter->macaddr_set = netxen_p3_nic_set_mac_addr;
1793 adapter->set_multi = netxen_p3_nic_set_multi;
1795 adapter->phy_read = nx_fw_cmd_query_phy;
1796 adapter->phy_write = nx_fw_cmd_set_phy;
1800 int netxen_nic_get_board_info(struct netxen_adapter *adapter)
1803 struct pci_dev *pdev = adapter->pdev;
1806 if (netxen_rom_fast_read(adapter, offset, &magic))
1816 if (netxen_rom_fast_read(adapter, offset, &board_type))
1819 adapter->ahw.board_type = board_type;
1822 u32 gpio = NXRD32(adapter, NETXEN_ROMUSB_GLB_PAD_GPIO_I);
1829 adapter->ahw.port_type = NETXEN_NIC_GBE;
1845 adapter->ahw.port_type = NETXEN_NIC_XGBE;
1854 adapter->ahw.port_type = NETXEN_NIC_GBE;
1857 adapter->ahw.port_type = (adapter->portnum < 2) ?
1862 adapter->ahw.port_type = NETXEN_NIC_XGBE;
1871 int netxen_nic_set_mtu_gb(struct netxen_adapter *adapter, int new_mtu)
1874 NXWR32(adapter, NETXEN_NIU_GB_MAX_FRAME_SIZE(adapter->physical_port),
1879 int netxen_nic_set_mtu_xgb(struct netxen_adapter *adapter, int new_mtu)
1882 if (adapter->physical_port == 0)
1883 NXWR32(adapter, NETXEN_NIU_XGE_MAX_FRAME_SIZE, new_mtu);
1885 NXWR32(adapter, NETXEN_NIU_XG1_MAX_FRAME_SIZE, new_mtu);
1889 void netxen_nic_set_link_parameters(struct netxen_adapter *adapter)
1895 if (!netif_carrier_ok(adapter->netdev)) {
1896 adapter->link_speed = 0;
1897 adapter->link_duplex = -1;
1898 adapter->link_autoneg = AUTONEG_ENABLE;
1902 if (adapter->ahw.port_type == NETXEN_NIC_GBE) {
1903 port_mode = NXRD32(adapter, NETXEN_PORT_MODE_ADDR);
1905 adapter->link_speed = SPEED_1000;
1906 adapter->link_duplex = DUPLEX_FULL;
1907 adapter->link_autoneg = AUTONEG_DISABLE;
1911 if (adapter->phy_read &&
1912 adapter->phy_read(adapter,
1918 adapter->link_speed = SPEED_10;
1921 adapter->link_speed = SPEED_100;
1924 adapter->link_speed = SPEED_1000;
1927 adapter->link_speed = 0;
1932 adapter->link_duplex = DUPLEX_HALF;
1935 adapter->link_duplex = DUPLEX_FULL;
1938 adapter->link_duplex = -1;
1941 if (adapter->phy_read &&
1942 adapter->phy_read(adapter,
1945 adapter->link_autoneg = autoneg;
1950 adapter->link_speed = 0;
1951 adapter->link_duplex = -1;
1957 netxen_nic_wol_supported(struct netxen_adapter *adapter)
1961 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
1964 wol_cfg = NXRD32(adapter, NETXEN_WOL_CONFIG_NV);
1965 if (wol_cfg & (1UL << adapter->portnum)) {
1966 wol_cfg = NXRD32(adapter, NETXEN_WOL_CONFIG);
1967 if (wol_cfg & (1 << adapter->portnum))